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i965: Generalize emit_urb_slot() to emit to any dst_reg.

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In gen7+ we emit vertices as they come, however in gen6 geometry shaders we
have to buffer vertex data for all vertices and then emit it all in one go
at the end. To achieve this we need to generalize emit_urb_slot() to store
vertex data in general purpose registers and not only MRF registers.

Acked-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
This commit is contained in:
Iago Toral Quiroga 2014-07-17 16:59:10 +02:00
parent 9b32fd0f70
commit 5c30da1845
2 changed files with 20 additions and 14 deletions
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4
src/mesa/drivers/dri/i965/brw_vec4.h
View file

@ -533,10 +533,10 @@ public:
void swizzle_result(ir_texture *ir, src_reg orig_val, uint32_t sampler);
void emit_ndc_computation();
void emit_psiz_and_flags(struct brw_reg reg);
void emit_psiz_and_flags(dst_reg reg);
void emit_clip_distances(dst_reg reg, int offset);
void emit_generic_urb_slot(dst_reg reg, int varying);
void emit_urb_slot(int mrf, int varying);
void emit_urb_slot(dst_reg reg, int varying);
void emit_shader_time_begin();
void emit_shader_time_end();

30
src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp
View file

@ -2929,7 +2929,7 @@ vec4_visitor::emit_ndc_computation()
}
void
vec4_visitor::emit_psiz_and_flags(struct brw_reg reg)
vec4_visitor::emit_psiz_and_flags(dst_reg reg)
{
if (brw->gen < 6 &&
((prog_data->vue_map.slots_valid & VARYING_BIT_PSIZ) ||
@ -2989,16 +2989,21 @@ vec4_visitor::emit_psiz_and_flags(struct brw_reg reg)
} else {
emit(MOV(retype(reg, BRW_REGISTER_TYPE_D), src_reg(0)));
if (prog_data->vue_map.slots_valid & VARYING_BIT_PSIZ) {
emit(MOV(brw_writemask(reg, WRITEMASK_W),
src_reg(output_reg[VARYING_SLOT_PSIZ])));
dst_reg reg_w = reg;
reg_w.writemask = WRITEMASK_W;
emit(MOV(reg_w, src_reg(output_reg[VARYING_SLOT_PSIZ])));
}
if (prog_data->vue_map.slots_valid & VARYING_BIT_LAYER) {
emit(MOV(retype(brw_writemask(reg, WRITEMASK_Y), BRW_REGISTER_TYPE_D),
src_reg(output_reg[VARYING_SLOT_LAYER])));
dst_reg reg_y = reg;
reg_y.writemask = WRITEMASK_Y;
reg_y.type = BRW_REGISTER_TYPE_D;
emit(MOV(reg_y, src_reg(output_reg[VARYING_SLOT_LAYER])));
}
if (prog_data->vue_map.slots_valid & VARYING_BIT_VIEWPORT) {
emit(MOV(retype(brw_writemask(reg, WRITEMASK_Z), BRW_REGISTER_TYPE_D),
src_reg(output_reg[VARYING_SLOT_VIEWPORT])));
dst_reg reg_z = reg;
reg_z.writemask = WRITEMASK_Z;
reg_z.type = BRW_REGISTER_TYPE_D;
emit(MOV(reg_z, src_reg(output_reg[VARYING_SLOT_VIEWPORT])));
}
}
}
@ -3051,18 +3056,18 @@ vec4_visitor::emit_generic_urb_slot(dst_reg reg, int varying)
}
void
vec4_visitor::emit_urb_slot(int mrf, int varying)
vec4_visitor::emit_urb_slot(dst_reg reg, int varying)
{
struct brw_reg hw_reg = brw_message_reg(mrf);
dst_reg reg = dst_reg(MRF, mrf);
reg.type = BRW_REGISTER_TYPE_F;
switch (varying) {
case VARYING_SLOT_PSIZ:
{
/* PSIZ is always in slot 0, and is coupled with other flags. */
current_annotation = "indices, point width, clip flags";
emit_psiz_and_flags(hw_reg);
emit_psiz_and_flags(reg);
break;
}
case BRW_VARYING_SLOT_NDC:
current_annotation = "NDC";
emit(MOV(reg, src_reg(output_reg[BRW_VARYING_SLOT_NDC])));
@ -3170,7 +3175,8 @@ vec4_visitor::emit_vertex()
mrf = base_mrf + 1;
for (; slot < prog_data->vue_map.num_slots; ++slot) {
emit_urb_slot(mrf++, prog_data->vue_map.slot_to_varying[slot]);
emit_urb_slot(dst_reg(MRF, mrf++),
prog_data->vue_map.slot_to_varying[slot]);
/* If this was max_usable_mrf, we can't fit anything more into this
* URB WRITE.