nvk: Clean up boilerplate around complex NIR flags
Some checks are pending
macOS-CI / macOS-CI (dri) (push) Waiting to run
macOS-CI / macOS-CI (xlib) (push) Waiting to run

This commit moves boilerplate code surrounding NIR flags in a common
NAK_AS_U32 macro. The code only checks that the flag structure
has only 32 bits and then copies it into a 32-bit int.

Signed-off-by: Lorenzo Rossi <snowycoder@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34940>
This commit is contained in:
Lorenzo Rossi 2025-05-13 19:40:01 +02:00 committed by Marge Bot
parent 769510f1cc
commit 5ba982f166
3 changed files with 14 additions and 20 deletions

View file

@ -16,13 +16,11 @@ load_fs_input(nir_builder *b, unsigned num_components, uint32_t addr,
.interp_freq = NAK_INTERP_FREQ_CONSTANT,
.interp_loc = NAK_INTERP_LOC_DEFAULT,
};
uint32_t flags_u32;
memcpy(&flags_u32, &flags, sizeof(flags_u32));
nir_def *comps[NIR_MAX_VEC_COMPONENTS];
for (unsigned c = 0; c < num_components; c++) {
comps[c] = nir_ipa_nv(b, nir_imm_float(b, 0), nir_imm_int(b, 0),
.base = addr + c * 4, .flags = flags_u32);
.base = addr + c * 4, .flags = NAK_AS_U32(flags));
}
return nir_vec(b, comps, num_components);
}
@ -42,11 +40,9 @@ load_frag_w(nir_builder *b, enum nak_interp_loc interp_loc, nir_def *offset,
.interp_freq = NAK_INTERP_FREQ_PASS,
.interp_loc = interp_loc,
};
uint32_t flags_u32;
memcpy(&flags_u32, &flags, sizeof(flags_u32));
return nir_ipa_nv(b, nir_imm_float(b, 0), offset,
.base = w_addr, .flags = flags_u32);
.base = w_addr, .flags = NAK_AS_U32(flags));
}
static nir_def *
@ -65,14 +61,12 @@ interp_fs_input(nir_builder *b, unsigned num_components, uint32_t addr,
.interp_freq = NAK_INTERP_FREQ_PASS,
.interp_loc = interp_loc,
};
uint32_t flags_u32;
memcpy(&flags_u32, &flags, sizeof(flags_u32));
nir_def *comps[NIR_MAX_VEC_COMPONENTS];
for (unsigned c = 0; c < num_components; c++) {
comps[c] = nir_ipa_nv(b, nir_imm_float(b, 0), offset,
.base = addr + c * 4,
.flags = flags_u32);
.flags = NAK_AS_U32(flags));
if (interp_mode == NAK_INTERP_MODE_PERSPECTIVE)
comps[c] = nir_fmul(b, comps[c], inv_w);
}
@ -89,14 +83,11 @@ interp_fs_input(nir_builder *b, unsigned num_components, uint32_t addr,
else
inv_w = nir_imm_float(b, 0);
uint32_t flags_u32;
memcpy(&flags_u32, &flags, sizeof(flags_u32));
nir_def *comps[NIR_MAX_VEC_COMPONENTS];
for (unsigned c = 0; c < num_components; c++) {
comps[c] = nir_ipa_nv(b, inv_w, offset,
.base = addr + c * 4,
.flags = flags_u32);
.flags = NAK_AS_U32(flags));
}
return nir_vec(b, comps, num_components);
} else {

View file

@ -186,10 +186,6 @@ lower_vtg_io_intrin(nir_builder *b,
.phys = !offset_is_const && !is_patch,
};
uint32_t flags_u32;
STATIC_ASSERT(sizeof(flags_u32) == sizeof(flags));
memcpy(&flags_u32, &flags, sizeof(flags_u32));
nir_def *dst_comps[NIR_MAX_VEC_COMPONENTS];
while (mask) {
const unsigned c = ffs(mask) - 1;
@ -217,7 +213,7 @@ lower_vtg_io_intrin(nir_builder *b,
/* Use al2p to compute a physical address */
c_offset = nir_al2p_nv(b, offset, .base = c_addr,
.flags = flags_u32);
.flags = NAK_AS_U32(flags));
c_addr = 0;
}
@ -225,14 +221,14 @@ lower_vtg_io_intrin(nir_builder *b,
nir_def *c_data = nir_channels(b, data, BITFIELD_RANGE(c, comps));
nir_ast_nv(b, c_data, vtx, c_offset,
.base = c_addr,
.flags = flags_u32,
.flags = NAK_AS_U32(flags),
.range_base = base_addr,
.range = range);
} else {
uint32_t access = flags.output ? 0 : ACCESS_CAN_REORDER;
nir_def *c_data = nir_ald_nv(b, comps, vtx, c_offset,
.base = c_addr,
.flags = flags_u32,
.flags = NAK_AS_U32(flags),
.range_base = base_addr,
.range = range,
.access = access);

View file

@ -191,6 +191,13 @@ PRAGMA_DIAGNOSTIC_POP
static_assert(sizeof(struct nak_nir_tex_flags) == 4,
"nak_nir_tex_flags has no holes");
#define NAK_AS_U32(x) ({\
static_assert(sizeof(x) == 4, "x must be 4 bytes"); \
uint32_t _u; \
memcpy(&_u, &(x), 4); \
_u; \
})
bool nak_nir_lower_scan_reduce(nir_shader *shader);
bool nak_nir_lower_tex(nir_shader *nir, const struct nak_compiler *nak);
bool nak_nir_lower_gs_intrinsics(nir_shader *shader);