From 5b766968616a8d033855a0760335f35cc8b3b9f4 Mon Sep 17 00:00:00 2001 From: Lionel Landwerlin Date: Thu, 30 Nov 2023 19:14:23 +0200 Subject: [PATCH] intel/clc: enable printfs support Reviewed-by: Ivan Briano Part-of: --- src/intel/compiler/brw_kernel.c | 8 ++++++++ src/intel/compiler/intel_clc.c | 25 +++++++++++++++++++++++++ 2 files changed, 33 insertions(+) diff --git a/src/intel/compiler/brw_kernel.c b/src/intel/compiler/brw_kernel.c index 92ef3a180f9..1d4f7774a54 100644 --- a/src/intel/compiler/brw_kernel.c +++ b/src/intel/compiler/brw_kernel.c @@ -288,6 +288,7 @@ brw_kernel_from_spirv(struct brw_compiler *compiler, struct spirv_to_nir_options spirv_options = { .environment = NIR_SPIRV_OPENCL, .capabilities = &spirv_caps, + .printf = true, .shared_addr_format = nir_address_format_62bit_generic, .global_addr_format = nir_address_format_62bit_generic, .temp_addr_format = nir_address_format_62bit_generic, @@ -321,6 +322,12 @@ brw_kernel_from_spirv(struct brw_compiler *compiler, nir_print_shader(nir, stderr); } + nir_lower_printf_options printf_opts = { + .ptr_bit_size = 64, + .use_printf_base_identifier = true, + }; + NIR_PASS_V(nir, nir_lower_printf, &printf_opts); + NIR_PASS_V(nir, implement_intel_builtins); NIR_PASS_V(nir, nir_link_shader_functions, spirv_options.clc_shader); @@ -600,6 +607,7 @@ brw_nir_from_spirv(void *mem_ctx, unsigned gfx_version, const uint32_t *spirv, struct spirv_to_nir_options spirv_options = { .environment = NIR_SPIRV_OPENCL, .capabilities = &spirv_caps, + .printf = true, .shared_addr_format = nir_address_format_62bit_generic, .global_addr_format = nir_address_format_62bit_generic, .temp_addr_format = nir_address_format_62bit_generic, diff --git a/src/intel/compiler/intel_clc.c b/src/intel/compiler/intel_clc.c index 31cc820239f..ea19a8bd026 100644 --- a/src/intel/compiler/intel_clc.c +++ b/src/intel/compiler/intel_clc.c @@ -167,6 +167,8 @@ print_cs_prog_data_fields(FILE *fp, const char *prefix, const char *pad, PROG_DATA_FIELD("%u", base.const_data_offset); PROG_DATA_FIELD("%u", base.num_relocs); fprintf(fp, "%s.base.relocs = %s_relocs,\n", pad, prefix); + PROG_DATA_FIELD("%u", base.printf_info_count); + fprintf(fp, "%s.base.printf_info = (u_printf_info *)%s_printfs,\n", pad, prefix); assert(!cs_prog_data->base.has_ubo_pull); assert(cs_prog_data->base.dispatch_grf_start_reg == 0); assert(!cs_prog_data->base.use_alt_mode); @@ -224,6 +226,28 @@ print_kernel(FILE *fp, const char *prefix, kernel->prog_data.base.num_relocs * sizeof(kernel->prog_data.base.relocs[0])); + fprintf(fp, "static const u_printf_info %s_printfs[] = {\n", + prefix); + for (unsigned i = 0; i < kernel->prog_data.base.printf_info_count; i++) { + const u_printf_info *printf_info = &kernel->prog_data.base.printf_info[i]; + fprintf(fp, " {\n"); + fprintf(fp, " .num_args = %"PRIu32",\n", printf_info->num_args); + fprintf(fp, " .arg_sizes = (unsigned []) {\n"); + for (unsigned a = 0; a < printf_info->num_args; a++) + fprintf(fp, " %"PRIu32",\n", printf_info->arg_sizes[a]); + fprintf(fp, " },\n"); + fprintf(fp, " .string_size = %"PRIu32",\n", printf_info->string_size); + fprintf(fp, " .strings = (char []) {"); + for (unsigned c = 0; c < printf_info->string_size; c++) { + if (c % 8 == 0 ) + fprintf(fp, "\n "); + fprintf(fp, "0x%02hhx, ", printf_info->strings[c]); + } + fprintf(fp, "\n },\n"); + fprintf(fp, " },\n"); + } + fprintf(fp, "};\n"); + /* Get rid of the pointers before we hash */ struct brw_cs_prog_data cs_prog_data = kernel->prog_data; cs_prog_data.base.relocs = NULL; @@ -345,6 +369,7 @@ output_nir(const struct intel_clc_params *params, struct clc_binary *binary) struct spirv_to_nir_options spirv_options = { .environment = NIR_SPIRV_OPENCL, .capabilities = &spirv_caps, + .printf = true, .shared_addr_format = nir_address_format_62bit_generic, .global_addr_format = nir_address_format_62bit_generic, .temp_addr_format = nir_address_format_62bit_generic,