diff --git a/src/freedreno/vulkan/tu_cmd_buffer.cc b/src/freedreno/vulkan/tu_cmd_buffer.cc index efbdce21068..02abea4e7e3 100644 --- a/src/freedreno/vulkan/tu_cmd_buffer.cc +++ b/src/freedreno/vulkan/tu_cmd_buffer.cc @@ -5134,7 +5134,7 @@ tu_CmdEndTransformFeedbackEXT(VkCommandBuffer commandBuffer, /* VPC_SO_FLUSH_BASE has dwords counter, but counter should be in bytes */ tu_cs_emit_pkt7(cs, CP_MEM_TO_REG, 3); - tu_cs_emit(cs, CP_MEM_TO_REG_0_REG(REG_A6XX_CP_SCRATCH_REG(0)) | + tu_cs_emit(cs, CP_MEM_TO_REG_0_REG(REG_A6XX_CP_SCRATCH(0)) | COND(CHIP == A6XX, CP_MEM_TO_REG_0_SHIFT_BY_2) | 0x40000 | /* ??? */ CP_MEM_TO_REG_0_UNK31 | @@ -5143,14 +5143,14 @@ tu_CmdEndTransformFeedbackEXT(VkCommandBuffer commandBuffer, if (offset) { tu_cs_emit_pkt7(cs, CP_REG_RMW, 3); - tu_cs_emit(cs, CP_REG_RMW_0_DST_REG(REG_A6XX_CP_SCRATCH_REG(0)) | + tu_cs_emit(cs, CP_REG_RMW_0_DST_REG(REG_A6XX_CP_SCRATCH(0)) | CP_REG_RMW_0_SRC1_ADD); tu_cs_emit(cs, 0xffffffff); tu_cs_emit(cs, -offset); } tu_cs_emit_pkt7(cs, CP_REG_TO_MEM, 3); - tu_cs_emit(cs, CP_REG_TO_MEM_0_REG(REG_A6XX_CP_SCRATCH_REG(0)) | + tu_cs_emit(cs, CP_REG_TO_MEM_0_REG(REG_A6XX_CP_SCRATCH(0)) | CP_REG_TO_MEM_0_CNT(1)); tu_cs_emit_qw(cs, vk_buffer_address(&buf->vk, counter_buffer_offset)); } diff --git a/src/freedreno/vulkan/tu_query_pool.cc b/src/freedreno/vulkan/tu_query_pool.cc index 6a1bf454b0f..a5fd0137de7 100644 --- a/src/freedreno/vulkan/tu_query_pool.cc +++ b/src/freedreno/vulkan/tu_query_pool.cc @@ -1158,7 +1158,7 @@ emit_perfcntrs_pass_start(bool has_pred_bit, struct tu_cs *cs, uint32_t pass) { tu_cs_emit_pkt7(cs, CP_REG_TEST, 1); tu_cs_emit(cs, A6XX_CP_REG_TEST_0_REG( - REG_A6XX_CP_SCRATCH_REG(PERF_CNTRS_REG)) | + REG_A6XX_CP_SCRATCH(PERF_CNTRS_REG)) | A6XX_CP_REG_TEST_0_BIT(pass) | (has_pred_bit ? A6XX_CP_REG_TEST_0_PRED_BIT(TU_PREDICATE_PERFCNTRS) : 0) |