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r600g: cleanup MSAA texture support checking
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
parent
61c995bc47
commit
5a3fac4d26
7 changed files with 21 additions and 72 deletions
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@ -1219,7 +1219,7 @@ evergreen_create_sampler_view_custom(struct pipe_context *ctx,
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view->tex_resource_words[2] = (surflevel[0].offset + r600_resource_va(ctx->screen, texture)) >> 8;
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/* TEX_RESOURCE_WORD3.MIP_ADDRESS */
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if (texture->nr_samples > 1 && rscreen->msaa_texture_support == MSAA_TEXTURE_COMPRESSED) {
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if (texture->nr_samples > 1 && rscreen->has_compressed_msaa_texturing) {
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if (tmp->is_depth) {
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/* disable FMASK (0 = disabled) */
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view->tex_resource_words[3] = 0;
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@ -3537,21 +3537,13 @@ void *evergreen_create_resolve_blend(struct r600_context *rctx)
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void *evergreen_create_decompress_blend(struct r600_context *rctx)
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{
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struct pipe_blend_state blend;
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unsigned mode = rctx->screen->has_compressed_msaa_texturing ?
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V_028808_CB_FMASK_DECOMPRESS : V_028808_CB_DECOMPRESS;
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memset(&blend, 0, sizeof(blend));
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blend.independent_blend_enable = true;
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blend.rt[0].colormask = 0xf;
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return evergreen_create_blend_state_mode(&rctx->context, &blend, V_028808_CB_DECOMPRESS);
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}
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void *evergreen_create_fmask_decompress_blend(struct r600_context *rctx)
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{
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struct pipe_blend_state blend;
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memset(&blend, 0, sizeof(blend));
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blend.independent_blend_enable = true;
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blend.rt[0].colormask = 0xf;
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return evergreen_create_blend_state_mode(&rctx->context, &blend, V_028808_CB_FMASK_DECOMPRESS);
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return evergreen_create_blend_state_mode(&rctx->context, &blend, mode);
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}
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void *evergreen_create_db_flush_dsa(struct r600_context *rctx)
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@ -126,7 +126,7 @@ static unsigned stack_entry_size(enum radeon_family chip) {
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void r600_bytecode_init(struct r600_bytecode *bc,
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enum chip_class chip_class,
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enum radeon_family family,
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enum r600_msaa_texture_mode msaa_texture_mode)
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bool has_compressed_msaa_texturing)
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{
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static unsigned next_shader_id = 0;
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@ -143,7 +143,7 @@ void r600_bytecode_init(struct r600_bytecode *bc,
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LIST_INITHEAD(&bc->cf);
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bc->chip_class = chip_class;
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bc->msaa_texture_mode = msaa_texture_mode;
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bc->has_compressed_msaa_texturing = has_compressed_msaa_texturing;
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bc->stack.entry_size = stack_entry_size(family);
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}
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@ -2287,7 +2287,7 @@ void *r600_create_vertex_fetch_shader(struct pipe_context *ctx,
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memset(&bc, 0, sizeof(bc));
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r600_bytecode_init(&bc, rctx->chip_class, rctx->family,
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rctx->screen->msaa_texture_support);
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rctx->screen->has_compressed_msaa_texturing);
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bc.isa = rctx->isa;
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@ -195,7 +195,7 @@ struct r600_stack_info {
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struct r600_bytecode {
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enum chip_class chip_class;
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enum r600_msaa_texture_mode msaa_texture_mode;
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bool has_compressed_msaa_texturing;
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int type;
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struct list_head cf;
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struct r600_bytecode_cf *cf_last;
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@ -225,7 +225,7 @@ int eg_bytecode_cf_build(struct r600_bytecode *bc, struct r600_bytecode_cf *cf);
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void r600_bytecode_init(struct r600_bytecode *bc,
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enum chip_class chip_class,
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enum radeon_family family,
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enum r600_msaa_texture_mode msaa_texture_mode);
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bool has_compressed_msaa_texturing);
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void r600_bytecode_clear(struct r600_bytecode *bc);
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int r600_bytecode_add_alu(struct r600_bytecode *bc,
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const struct r600_bytecode_alu *alu);
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@ -290,25 +290,10 @@ static void r600_blit_decompress_color(struct pipe_context *ctx,
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{
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struct r600_context *rctx = (struct r600_context *)ctx;
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unsigned layer, level, checked_last_layer, max_layer;
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void *blend_decompress;
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if (!rtex->dirty_level_mask)
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return;
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switch (rctx->screen->msaa_texture_support) {
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case MSAA_TEXTURE_DECOMPRESSED:
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blend_decompress = rctx->custom_blend_decompress;
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break;
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case MSAA_TEXTURE_COMPRESSED:
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blend_decompress = rctx->custom_blend_fmask_decompress;
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break;
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case MSAA_TEXTURE_SAMPLE_ZERO:
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default:
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/* Nothing to do. */
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rtex->dirty_level_mask = 0;
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return;
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}
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for (level = first_level; level <= last_level; level++) {
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if (!(rtex->dirty_level_mask & (1 << level)))
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continue;
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@ -328,7 +313,7 @@ static void r600_blit_decompress_color(struct pipe_context *ctx,
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cbsurf = ctx->create_surface(ctx, &rtex->resource.b.b, &surf_tmpl);
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r600_blitter_begin(ctx, R600_DECOMPRESS);
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util_blitter_custom_color(rctx->blitter, cbsurf, blend_decompress);
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util_blitter_custom_color(rctx->blitter, cbsurf, rctx->custom_blend_decompress);
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r600_blitter_end(ctx);
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pipe_surface_reference(&cbsurf, NULL);
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@ -578,7 +563,6 @@ static void r600_resource_copy_region(struct pipe_context *ctx,
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struct pipe_sampler_view src_templ, *src_view;
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unsigned dst_width, dst_height, src_width0, src_height0, src_widthFL, src_heightFL;
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struct pipe_box sbox, dstbox;
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bool copy_all_samples;
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/* Handle buffers first. */
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if (dst->target == PIPE_BUFFER && src->target == PIPE_BUFFER) {
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@ -690,8 +674,6 @@ static void r600_resource_copy_region(struct pipe_context *ctx,
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src_widthFL, src_heightFL);
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}
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copy_all_samples = rctx->screen->msaa_texture_support != MSAA_TEXTURE_SAMPLE_ZERO;
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u_box_3d(dstx, dsty, dstz, abs(src_box->width), abs(src_box->height),
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abs(src_box->depth), &dstbox);
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@ -700,7 +682,7 @@ static void r600_resource_copy_region(struct pipe_context *ctx,
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util_blitter_blit_generic(rctx->blitter, dst_view, &dstbox,
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src_view, src_box, src_width0, src_height0,
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PIPE_MASK_RGBAZS, PIPE_TEX_FILTER_NEAREST, NULL,
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copy_all_samples);
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TRUE);
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r600_blitter_end(ctx);
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pipe_surface_reference(&dst_view, NULL);
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@ -333,9 +333,6 @@ static void r600_destroy_context(struct pipe_context *context)
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if (rctx->custom_blend_decompress) {
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rctx->context.delete_blend_state(&rctx->context, rctx->custom_blend_decompress);
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}
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if (rctx->custom_blend_fmask_decompress) {
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rctx->context.delete_blend_state(&rctx->context, rctx->custom_blend_fmask_decompress);
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}
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util_unreference_framebuffer_state(&rctx->framebuffer.state);
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if (rctx->blitter) {
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@ -430,7 +427,6 @@ static struct pipe_context *r600_create_context(struct pipe_screen *screen, void
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rctx->custom_dsa_flush = evergreen_create_db_flush_dsa(rctx);
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rctx->custom_blend_resolve = evergreen_create_resolve_blend(rctx);
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rctx->custom_blend_decompress = evergreen_create_decompress_blend(rctx);
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rctx->custom_blend_fmask_decompress = evergreen_create_fmask_decompress_blend(rctx);
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rctx->has_vertex_cache = !(rctx->family == CHIP_CEDAR ||
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rctx->family == CHIP_PALM ||
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rctx->family == CHIP_SUMO ||
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@ -591,7 +587,9 @@ static int r600_get_param(struct pipe_screen* pscreen, enum pipe_cap param)
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case PIPE_CAP_TEXTURE_BUFFER_OBJECTS:
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case PIPE_CAP_PREFER_BLIT_BASED_TEXTURE_TRANSFER:
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case PIPE_CAP_QUERY_PIPELINE_STATISTICS:
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case PIPE_CAP_TEXTURE_MULTISAMPLE:
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return 1;
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case PIPE_CAP_TGSI_TEXCOORD:
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return 0;
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@ -610,9 +608,6 @@ static int r600_get_param(struct pipe_screen* pscreen, enum pipe_cap param)
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case PIPE_CAP_GLSL_FEATURE_LEVEL:
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return 140;
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case PIPE_CAP_TEXTURE_MULTISAMPLE:
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return rscreen->msaa_texture_support != MSAA_TEXTURE_SAMPLE_ZERO;
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/* Supported except the original R600. */
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case PIPE_CAP_INDEP_BLEND_ENABLE:
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case PIPE_CAP_INDEP_BLEND_FUNC:
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@ -1261,22 +1256,19 @@ struct pipe_screen *r600_screen_create(struct radeon_winsys *ws)
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case R600:
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case R700:
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rscreen->has_msaa = rscreen->info.drm_minor >= 22;
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rscreen->msaa_texture_support = MSAA_TEXTURE_DECOMPRESSED;
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rscreen->has_compressed_msaa_texturing = false;
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break;
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case EVERGREEN:
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rscreen->has_msaa = rscreen->info.drm_minor >= 19;
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rscreen->msaa_texture_support =
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rscreen->info.drm_minor >= 24 ? MSAA_TEXTURE_COMPRESSED :
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MSAA_TEXTURE_DECOMPRESSED;
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rscreen->has_compressed_msaa_texturing = rscreen->info.drm_minor >= 24;
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break;
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case CAYMAN:
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rscreen->has_msaa = rscreen->info.drm_minor >= 19;
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rscreen->msaa_texture_support = MSAA_TEXTURE_COMPRESSED;
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rscreen->has_compressed_msaa_texturing = true;
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break;
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default:
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rscreen->has_msaa = FALSE;
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rscreen->msaa_texture_support = 0;
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break;
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rscreen->has_compressed_msaa_texturing = false;
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}
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rscreen->has_cp_dma = rscreen->info.drm_minor >= 27 &&
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@ -216,22 +216,6 @@ struct r600_pipe_fences {
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pipe_mutex mutex;
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};
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enum r600_msaa_texture_mode {
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/* If the hw can fetch the first sample only (no decompression available).
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* This means MSAA texturing is not fully implemented. */
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MSAA_TEXTURE_SAMPLE_ZERO,
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/* If the hw can fetch decompressed MSAA textures.
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* Supported families: R600, R700, Evergreen.
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* Cayman cannot use this, because it cannot do the decompression. */
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MSAA_TEXTURE_DECOMPRESSED,
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/* If the hw can fetch compressed MSAA textures, which means shaders can
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* read resolved FMASK. This yields the best performance.
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* Supported families: Evergreen, Cayman. */
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MSAA_TEXTURE_COMPRESSED
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};
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typedef boolean (*r600g_dma_blit_t)(struct pipe_context *ctx,
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struct pipe_resource *dst,
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unsigned dst_level,
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@ -282,7 +266,7 @@ struct r600_screen {
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bool has_streamout;
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bool has_msaa;
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bool has_cp_dma;
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enum r600_msaa_texture_mode msaa_texture_support;
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bool has_compressed_msaa_texturing;
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struct r600_tiling_info tiling_info;
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struct r600_pipe_fences fences;
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@ -561,7 +545,6 @@ struct r600_context {
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void *custom_dsa_flush;
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void *custom_blend_resolve;
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void *custom_blend_decompress;
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void *custom_blend_fmask_decompress;
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/* With rasterizer discard, there doesn't have to be a pixel shader.
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* In that case, we bind this one: */
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void *dummy_pixel_shader;
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@ -713,7 +696,6 @@ void evergreen_update_vs_state(struct pipe_context *ctx, struct r600_pipe_shader
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void *evergreen_create_db_flush_dsa(struct r600_context *rctx);
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void *evergreen_create_resolve_blend(struct r600_context *rctx);
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void *evergreen_create_decompress_blend(struct r600_context *rctx);
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void *evergreen_create_fmask_decompress_blend(struct r600_context *rctx);
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boolean evergreen_is_format_supported(struct pipe_screen *screen,
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enum pipe_format format,
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enum pipe_texture_target target,
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@ -962,7 +962,7 @@ static int r600_shader_from_tgsi(struct r600_screen *rscreen,
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ctx.native_integers = true;
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r600_bytecode_init(ctx.bc, rscreen->chip_class, rscreen->family,
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rscreen->msaa_texture_support);
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rscreen->has_compressed_msaa_texturing);
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ctx.tokens = tokens;
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tgsi_scan_shader(tokens, &ctx.info);
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shader->indirect_files = ctx.info.indirect_files;
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@ -3794,10 +3794,11 @@ static int tgsi_tex(struct r600_shader_ctx *ctx)
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unsigned src_gpr;
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int r, i, j;
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int opcode;
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bool read_compressed_msaa = ctx->bc->msaa_texture_mode == MSAA_TEXTURE_COMPRESSED &&
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bool read_compressed_msaa = ctx->bc->has_compressed_msaa_texturing &&
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inst->Instruction.Opcode == TGSI_OPCODE_TXF &&
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(inst->Texture.Texture == TGSI_TEXTURE_2D_MSAA ||
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inst->Texture.Texture == TGSI_TEXTURE_2D_ARRAY_MSAA);
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/* Texture fetch instructions can only use gprs as source.
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* Also they cannot negate the source or take the absolute value */
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const boolean src_requires_loading = (inst->Instruction.Opcode != TGSI_OPCODE_TXQ_LZ &&
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