From 5a37467cfdffcce4288448cf59ef1703d125ef1e Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Jos=C3=A9=20Roberto=20de=20Souza?= Date: Tue, 14 Jan 2025 08:11:04 -0800 Subject: [PATCH] anv: Return scanout PAT entry for scanout and external buffers in discrete GPUs MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Without this scanout and external buffers will be allocated as WB what will fail allocation if DRM_XE_GEM_CREATE_FLAG_SCANOUT is set or it will use WC but it will not be the special PAT entry for scanout. Cc: mesa-stable Reviewed-by: Nanley Chery Signed-off-by: José Roberto de Souza Part-of: --- src/intel/vulkan/anv_device.c | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/src/intel/vulkan/anv_device.c b/src/intel/vulkan/anv_device.c index b7724bf8e8d..1884932bbc7 100644 --- a/src/intel/vulkan/anv_device.c +++ b/src/intel/vulkan/anv_device.c @@ -2134,6 +2134,9 @@ anv_device_get_pat_entry(struct anv_device *device, if (alloc_flags & ANV_BO_ALLOC_COMPRESSED) return &device->info->pat.compressed; + if (alloc_flags & (ANV_BO_ALLOC_EXTERNAL | ANV_BO_ALLOC_SCANOUT)) + return &device->info->pat.scanout; + /* PAT indexes has no actual effect in DG2 and DG1, smem caches will always * be snopped by GPU and lmem will always be WC. * This might change in future discrete platforms. @@ -2147,8 +2150,6 @@ anv_device_get_pat_entry(struct anv_device *device, /* Integrated platforms handling only */ if ((alloc_flags & (ANV_BO_ALLOC_HOST_CACHED_COHERENT)) == ANV_BO_ALLOC_HOST_CACHED_COHERENT) return &device->info->pat.cached_coherent; - else if (alloc_flags & (ANV_BO_ALLOC_EXTERNAL | ANV_BO_ALLOC_SCANOUT)) - return &device->info->pat.scanout; else if (alloc_flags & ANV_BO_ALLOC_HOST_CACHED) return &device->info->pat.writeback_incoherent; else