From 5a1ccd0a888052bda65fa49af338c84cab604519 Mon Sep 17 00:00:00 2001 From: Ben Skeggs Date: Thu, 4 Nov 2021 11:21:47 +1000 Subject: [PATCH] nvc0: properly allocate copy engine class before using it Important for upcoming kernel changes to more correctly manage the CE context on Volta and newer, or the channel will be killed in response to a CTXNOTVALID error from the GPU. The kernel will have a workaround for Volta and Turing GPUs to preserve ABI, but will require userspace to behave correctly on Ampere and newer. Signed-off-by: Ben Skeggs Acked-by: M Henning Reviewed-by: Adam Jackson Reviewed-by: Karol Herbst Part-of: --- src/gallium/drivers/nouveau/nv_object.xml.h | 7 +++++- .../drivers/nouveau/nvc0/nvc0_screen.c | 24 +++++++++++++++++-- .../drivers/nouveau/nvc0/nvc0_screen.h | 1 + 3 files changed, 29 insertions(+), 3 deletions(-) diff --git a/src/gallium/drivers/nouveau/nv_object.xml.h b/src/gallium/drivers/nouveau/nv_object.xml.h index 20d5fd37a1e..6cfc26935e5 100644 --- a/src/gallium/drivers/nouveau/nv_object.xml.h +++ b/src/gallium/drivers/nouveau/nv_object.xml.h @@ -214,7 +214,12 @@ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. #define NV84_CRYPT_CLASS 0x000074c1 #define BLOB_NVC0_PCOPY1_CLASS 0x000090b8 #define BLOB_NVC0_PCOPY0_CLASS 0x000090b5 -#define NVE4_COPY_CLASS 0x0000a0b5 +#define KEPLER_DMA_COPY_A 0x0000a0b5 +#define MAXWELL_DMA_COPY_A 0x0000b0b5 +#define PASCAL_DMA_COPY_A 0x0000c0b5 +#define PASCAL_DMA_COPY_B 0x0000c1b5 +#define VOLTA_DMA_COPY_A 0x0000c3b5 +#define TURING_DMA_COPY_A 0x0000c5b5 #define NVE4_P2MF_CLASS 0x0000a040 #define NVF0_P2MF_CLASS 0x0000a140 #define NV31_MPEG_CLASS 0x00003174 diff --git a/src/gallium/drivers/nouveau/nvc0/nvc0_screen.c b/src/gallium/drivers/nouveau/nvc0/nvc0_screen.c index 8d01c7e6a2e..f949c32c2a0 100644 --- a/src/gallium/drivers/nouveau/nvc0/nvc0_screen.c +++ b/src/gallium/drivers/nouveau/nvc0/nvc0_screen.c @@ -734,6 +734,7 @@ nvc0_screen_destroy(struct pipe_screen *pscreen) nouveau_object_del(&screen->eng3d); nouveau_object_del(&screen->eng2d); nouveau_object_del(&screen->m2mf); + nouveau_object_del(&screen->copy); nouveau_object_del(&screen->compute); nouveau_object_del(&screen->nvsw); @@ -1167,9 +1168,28 @@ nvc0_screen_create(struct nouveau_device *dev) BEGIN_NVC0(push, SUBC_M2MF(NV01_SUBCHAN_OBJECT), 1); PUSH_DATA (push, screen->m2mf->oclass); - if (screen->m2mf->oclass == NVE4_P2MF_CLASS) { + + if (screen->m2mf->oclass >= NVE4_P2MF_CLASS) { + const struct nouveau_mclass copys[] = { + { TURING_DMA_COPY_A, -1 }, + { VOLTA_DMA_COPY_A, -1 }, + { PASCAL_DMA_COPY_B, -1 }, + { PASCAL_DMA_COPY_A, -1 }, + { MAXWELL_DMA_COPY_A, -1 }, + { KEPLER_DMA_COPY_A, -1 }, + {} + }; + + ret = nouveau_object_mclass(chan, copys); + if (ret < 0) + FAIL_SCREEN_INIT("No supported copy engine class: %d\n", ret); + + ret = nouveau_object_new(chan, 0, copys[ret].oclass, NULL, 0, &screen->copy); + if (ret) + FAIL_SCREEN_INIT("Error allocating copy engine class: %d\n", ret); + BEGIN_NVC0(push, SUBC_COPY(NV01_SUBCHAN_OBJECT), 1); - PUSH_DATA (push, NVE4_COPY_CLASS); + PUSH_DATA (push, screen->copy->oclass); } ret = nouveau_object_new(chan, 0xbeef902d, NVC0_2D_CLASS, NULL, 0, diff --git a/src/gallium/drivers/nouveau/nvc0/nvc0_screen.h b/src/gallium/drivers/nouveau/nvc0/nvc0_screen.h index 8bce90ae3af..07e3cde62c8 100644 --- a/src/gallium/drivers/nouveau/nvc0/nvc0_screen.h +++ b/src/gallium/drivers/nouveau/nvc0/nvc0_screen.h @@ -126,6 +126,7 @@ struct nvc0_screen { struct nouveau_object *eng3d; /* sqrt(1/2)|kepler> + sqrt(1/2)|fermi> */ struct nouveau_object *eng2d; struct nouveau_object *m2mf; + struct nouveau_object *copy; struct nouveau_object *compute; struct nouveau_object *nvsw; };