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radeon: remove even more common code

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This commit is contained in:
Dave Airlie 2009-01-29 19:11:31 +10:00
parent 5ba92a5b05
commit 59b183ce0f
6 changed files with 55 additions and 828 deletions
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1
src/mesa/drivers/dri/radeon/Makefile
View file

@ -15,7 +15,6 @@ DRIVER_SOURCES = \
radeon_state.c \
radeon_state_init.c \
radeon_tex.c \
radeon_texmem.c \
radeon_texstate.c \
radeon_tcl.c \
radeon_swtcl.c \

49
src/mesa/drivers/dri/radeon/radeon_context.c
View file

@ -225,6 +225,15 @@ static void r100_vtbl_set_all_dirty(GLcontext *ctx)
rmesa->hw.all_dirty = GL_TRUE;
}
static void r100_vtbl_emit_cs_header(struct radeon_cs *cs, radeonContextPtr rmesa)
{
}
static void r100_vtbl_emit_state(radeonContextPtr rmesa)
{
radeonEmitState((r100ContextPtr)rmesa);
}
static void r100_init_vtbl(radeonContextPtr radeon)
{
radeon->vtbl.get_lock = r100_get_lock;
@ -232,6 +241,8 @@ static void r100_init_vtbl(radeonContextPtr radeon)
radeon->vtbl.flush = r100_vtbl_flush;
radeon->vtbl.set_all_dirty = r100_vtbl_set_all_dirty;
radeon->vtbl.update_draw_buffer = radeonUpdateDrawBuffer;
radeon->vtbl.emit_cs_header = r100_vtbl_emit_cs_header;
radeon->vtbl.emit_state = r100_vtbl_emit_state;
}
/* Create the device specific context.
@ -290,35 +301,12 @@ radeonCreateContext( const __GLcontextModes *glVisual,
radeonInitDriverFuncs( &functions );
radeonInitTextureFuncs( &functions );
/* Allocate the Mesa context */
if (sharedContextPrivate)
shareCtx = ((radeonContextPtr) sharedContextPrivate)->glCtx;
else
shareCtx = NULL;
rmesa->radeon.glCtx = _mesa_create_context(glVisual, shareCtx,
&functions, (void *) rmesa);
if (!rmesa->radeon.glCtx) {
FREE(rmesa);
return GL_FALSE;
if (!radeonInitContext(&rmesa->radeon, &functions,
glVisual, driContextPriv,
sharedContextPrivate)) {
FREE(rmesa);
return GL_FALSE;
}
driContextPriv->driverPrivate = rmesa;
/* Init radeon context data */
rmesa->radeon.dri.context = driContextPriv;
rmesa->radeon.dri.screen = sPriv;
rmesa->radeon.dri.drawable = NULL;
rmesa->radeon.dri.readable = NULL;
rmesa->radeon.dri.hwContext = driContextPriv->hHWContext;
rmesa->radeon.dri.hwLock = &sPriv->pSAREA->lock;
rmesa->radeon.dri.fd = sPriv->fd;
rmesa->radeon.dri.drmMinor = sPriv->drm_version.minor;
rmesa->radeon.radeonScreen = screen;
rmesa->radeon.sarea = (drm_radeon_sarea_t *)((GLubyte *)sPriv->pSAREA +
screen->sarea_priv_offset);
//rmesa->dma.buf0_address = rmesa->radeon.radeonScreen->buffers->list[0].address;
(void) memset( rmesa->radeon.texture_heaps, 0, sizeof( rmesa->radeon.texture_heaps ) );
make_empty_list( & rmesa->radeon.swapped );
@ -523,11 +511,10 @@ void radeonDestroyContext( __DRIcontextPrivate *driContextPriv )
radeonDestroySwtcl( rmesa->radeon.glCtx );
radeonReleaseArrays( rmesa->radeon.glCtx, ~0 );
if (rmesa->radeon.dma.current) {
radeonReleaseDmaRegion( rmesa, &rmesa->radeon.dma.current, __FUNCTION__ );
radeonFlushCmdBuf( rmesa, __FUNCTION__ );
radeonReleaseDmaRegion( &rmesa->radeon );
radeonFlushCmdBuf( &rmesa->radeon, __FUNCTION__ );
}
radeonCleanupContext(&rmesa->radeon);
_mesa_vector4f_free( &rmesa->tcl.ObjClean );
if (rmesa->radeon.state.scissor.pClipRects) {

2
src/mesa/drivers/dri/radeon/radeon_cs_legacy.c
View file

@ -315,7 +315,7 @@ static int cs_emit(struct radeon_cs *cs)
cmd.boxes = (drm_clip_rect_t *) csm->ctx->pClipRects;
}
// dump_cmdbuf(cs);
dump_cmdbuf(cs);
r = drmCommandWrite(cs->csm->fd, DRM_RADEON_CMDBUF, &cmd, sizeof(cmd));
if (r) {

246
src/mesa/drivers/dri/radeon/radeon_ioctl.c
View file

@ -538,248 +538,6 @@ void radeonEmitWait( r100ContextPtr rmesa, GLuint flags )
cmd[0].wait.flags = flags;
}
static int radeonFlushCmdBufLocked( r100ContextPtr rmesa,
const char * caller )
{
int ret, i;
drm_radeon_cmd_buffer_t cmd;
if (rmesa->radeon.lost_context)
radeonBackUpAndEmitLostStateLocked(rmesa);
if (RADEON_DEBUG & DEBUG_IOCTL) {
fprintf(stderr, "%s from %s\n", __FUNCTION__, caller);
if (RADEON_DEBUG & DEBUG_VERBOSE)
for (i = 0 ; i < rmesa->store.cmd_used ; i += 4 )
fprintf(stderr, "%d: %x\n", i/4,
*(int *)(&rmesa->store.cmd_buf[i]));
}
if (RADEON_DEBUG & DEBUG_DMA)
fprintf(stderr, "%s: Releasing %d buffers\n", __FUNCTION__,
rmesa->dma.nr_released_bufs);
if (RADEON_DEBUG & DEBUG_SANITY) {
if (rmesa->radeon.state.scissor.enabled)
ret = radeonSanityCmdBuffer( rmesa,
rmesa->radeon.state.scissor.numClipRects,
rmesa->radeon.state.scissor.pClipRects);
else
ret = radeonSanityCmdBuffer( rmesa,
rmesa->radeon.numClipRects,
rmesa->radeon.pClipRects);
if (ret) {
fprintf(stderr, "drmSanityCommandWrite: %d\n", ret);
goto out;
}
}
cmd.bufsz = rmesa->store.cmd_used;
cmd.buf = rmesa->store.cmd_buf;
if (rmesa->radeon.state.scissor.enabled) {
cmd.nbox = rmesa->radeon.state.scissor.numClipRects;
cmd.boxes = rmesa->radeon.state.scissor.pClipRects;
} else {
cmd.nbox = rmesa->radeon.numClipRects;
cmd.boxes = rmesa->radeon.pClipRects;
}
ret = drmCommandWrite( rmesa->radeon.dri.fd,
DRM_RADEON_CMDBUF,
&cmd, sizeof(cmd) );
if (ret)
fprintf(stderr, "drmCommandWrite: %d\n", ret);
if (RADEON_DEBUG & DEBUG_SYNC) {
fprintf(stderr, "\nSyncing in %s\n\n", __FUNCTION__);
radeonWaitForIdleLocked( &rmesa->radeon );
}
out:
rmesa->store.primnr = 0;
rmesa->store.statenr = 0;
rmesa->store.cmd_used = 0;
rmesa->dma.nr_released_bufs = 0;
rmesa->save_on_next_emit = 1;
return ret;
}
/* Note: does not emit any commands to avoid recursion on
* radeonAllocCmdBuf.
*/
void radeonFlushCmdBuf( r100ContextPtr rmesa, const char *caller )
{
int ret;
LOCK_HARDWARE( &rmesa->radeon );
ret = radeonFlushCmdBufLocked( rmesa, caller );
UNLOCK_HARDWARE( &rmesa->radeon );
if (ret) {
fprintf(stderr, "drm_radeon_cmd_buffer_t: %d (exiting)\n", ret);
exit(ret);
}
}
/* =============================================================
* Hardware vertex buffer handling
*/
void radeonRefillCurrentDmaRegion( r100ContextPtr rmesa )
{
struct radeon_dma_buffer *dmabuf;
int fd = rmesa->radeon.dri.fd;
int index = 0;
int size = 0;
drmDMAReq dma;
int ret;
if (RADEON_DEBUG & (DEBUG_IOCTL|DEBUG_DMA))
fprintf(stderr, "%s\n", __FUNCTION__);
if (rmesa->dma.flush) {
rmesa->dma.flush( rmesa->radeon.glCtx );
}
if (rmesa->dma.current.buf)
radeonReleaseDmaRegion( rmesa, &rmesa->dma.current, __FUNCTION__ );
if (rmesa->dma.nr_released_bufs > 4)
radeonFlushCmdBuf( rmesa, __FUNCTION__ );
dma.context = rmesa->radeon.dri.hwContext;
dma.send_count = 0;
dma.send_list = NULL;
dma.send_sizes = NULL;
dma.flags = 0;
dma.request_count = 1;
dma.request_size = RADEON_BUFFER_SIZE;
dma.request_list = &index;
dma.request_sizes = &size;
dma.granted_count = 0;
LOCK_HARDWARE(&rmesa->radeon); /* no need to validate */
ret = drmDMA( fd, &dma );
if (ret != 0) {
/* Free some up this way?
*/
if (rmesa->dma.nr_released_bufs) {
radeonFlushCmdBufLocked( rmesa, __FUNCTION__ );
}
if (RADEON_DEBUG & DEBUG_DMA)
fprintf(stderr, "Waiting for buffers\n");
radeonWaitForIdleLocked( &rmesa->radeon );
ret = drmDMA( fd, &dma );
if ( ret != 0 ) {
UNLOCK_HARDWARE( &rmesa->radeon );
fprintf( stderr, "Error: Could not get dma buffer... exiting\n" );
exit( -1 );
}
}
UNLOCK_HARDWARE(&rmesa->radeon);
if (RADEON_DEBUG & DEBUG_DMA)
fprintf(stderr, "Allocated buffer %d\n", index);
dmabuf = CALLOC_STRUCT( radeon_dma_buffer );
dmabuf->buf = &rmesa->radeon.radeonScreen->buffers->list[index];
dmabuf->refcount = 1;
rmesa->dma.current.buf = dmabuf;
rmesa->dma.current.address = dmabuf->buf->address;
rmesa->dma.current.end = dmabuf->buf->total;
rmesa->dma.current.start = 0;
rmesa->dma.current.ptr = 0;
rmesa->c_vertexBuffers++;
}
void radeonReleaseDmaRegion( r100ContextPtr rmesa,
struct radeon_dma_region *region,
const char *caller )
{
if (RADEON_DEBUG & DEBUG_IOCTL)
fprintf(stderr, "%s from %s\n", __FUNCTION__, caller);
if (!region->buf)
return;
if (rmesa->dma.flush)
rmesa->dma.flush( rmesa->radeon.glCtx );
if (--region->buf->refcount == 0) {
drm_radeon_cmd_header_t *cmd;
if (RADEON_DEBUG & (DEBUG_IOCTL|DEBUG_DMA))
fprintf(stderr, "%s -- DISCARD BUF %d\n", __FUNCTION__,
region->buf->buf->idx);
cmd = (drm_radeon_cmd_header_t *)radeonAllocCmdBuf( rmesa, sizeof(*cmd),
__FUNCTION__ );
cmd->dma.cmd_type = RADEON_CMD_DMA_DISCARD;
cmd->dma.buf_idx = region->buf->buf->idx;
FREE(region->buf);
rmesa->dma.nr_released_bufs++;
}
region->buf = NULL;
region->start = 0;
}
/* Allocates a region from rmesa->dma.current. If there isn't enough
* space in current, grab a new buffer (and discard what was left of current)
*/
void radeonAllocDmaRegion( r100ContextPtr rmesa,
struct radeon_dma_region *region,
int bytes,
int alignment )
{
if (RADEON_DEBUG & DEBUG_IOCTL)
fprintf(stderr, "%s %d\n", __FUNCTION__, bytes);
if (rmesa->dma.flush)
rmesa->dma.flush( rmesa->radeon.glCtx );
if (region->buf)
radeonReleaseDmaRegion( rmesa, region, __FUNCTION__ );
alignment--;
rmesa->dma.current.start = rmesa->dma.current.ptr =
(rmesa->dma.current.ptr + alignment) & ~alignment;
if ( rmesa->dma.current.ptr + bytes > rmesa->dma.current.end )
radeonRefillCurrentDmaRegion( rmesa );
region->start = rmesa->dma.current.start;
region->ptr = rmesa->dma.current.start;
region->end = rmesa->dma.current.start + bytes;
region->address = rmesa->dma.current.address;
region->buf = rmesa->dma.current.buf;
region->buf->refcount++;
rmesa->dma.current.ptr += bytes; /* bug - if alignment > 7 */
rmesa->dma.current.start =
rmesa->dma.current.ptr = (rmesa->dma.current.ptr + 0x7) & ~0x7;
}
/* ================================================================
* Buffer clear
*/
@ -972,8 +730,8 @@ void radeonFlush( GLcontext *ctx )
if (RADEON_DEBUG & DEBUG_IOCTL)
fprintf(stderr, "%s\n", __FUNCTION__);
if (rmesa->dma.flush)
rmesa->dma.flush( rmesa->radeon.glCtx );
if (rmesa->radeon.dma.flush)
rmesa->radeon.dma.flush( rmesa->radeon.glCtx );
radeonEmitState( rmesa );

100
src/mesa/drivers/dri/radeon/radeon_maos_arrays.c
View file

@ -49,106 +49,6 @@ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
#include "radeon_maos.h"
#include "radeon_tcl.h"
#if 0
/* Usage:
* - from radeon_tcl_render
* - call radeonEmitArrays to ensure uptodate arrays in dma
* - emit primitives (new type?) which reference the data
* -- need to use elts for lineloop, quads, quadstrip/flat
* -- other primitives are all well-formed (need tristrip-1,fake-poly)
*
*/
static void emit_ubyte_rgba3( GLcontext *ctx,
struct radeon_dma_region *rvb,
char *data,
int stride,
int count )
{
int i;
radeon_color_t *out = (radeon_color_t *)(rvb->start + rvb->address);
if (RADEON_DEBUG & DEBUG_VERTS)
fprintf(stderr, "%s count %d stride %d out %p\n",
__FUNCTION__, count, stride, (void *)out);
for (i = 0; i < count; i++) {
out->red = *data;
out->green = *(data+1);
out->blue = *(data+2);
out->alpha = 0xFF;
out++;
data += stride;
}
}
static void emit_ubyte_rgba4( GLcontext *ctx,
struct radeon_dma_region *rvb,
char *data,
int stride,
int count )
{
int i;
int *out = (int *)(rvb->address + rvb->start);
if (RADEON_DEBUG & DEBUG_VERTS)
fprintf(stderr, "%s count %d stride %d\n",
__FUNCTION__, count, stride);
if (stride == 4)
COPY_DWORDS( out, data, count );
else
for (i = 0; i < count; i++) {
*out++ = LE32_TO_CPU(*(int *)data);
data += stride;
}
}
static void emit_ubyte_rgba( GLcontext *ctx,
struct radeon_dma_region *rvb,
char *data,
int size,
int stride,
int count )
{
radeonContextPtr rmesa = RADEON_CONTEXT(ctx);
if (RADEON_DEBUG & DEBUG_VERTS)
fprintf(stderr, "%s %d/%d\n", __FUNCTION__, count, size);
assert (!rvb->buf);
if (stride == 0) {
radeonAllocDmaRegion( rmesa, rvb, 4, 4 );
count = 1;
rvb->aos_start = GET_START(rvb);
rvb->aos_stride = 0;
rvb->aos_size = 1;
}
else {
radeonAllocDmaRegion( rmesa, rvb, 4 * count, 4 ); /* alignment? */
rvb->aos_start = GET_START(rvb);
rvb->aos_stride = 1;
rvb->aos_size = 1;
}
/* Emit the data
*/
switch (size) {
case 3:
emit_ubyte_rgba3( ctx, rvb, data, stride, count );
break;
case 4:
emit_ubyte_rgba4( ctx, rvb, data, stride, count );
break;
default:
assert(0);
exit(1);
break;
}
}
#endif
#if defined(USE_X86_ASM)
#define COPY_DWORDS( dst, src, nr ) \
do { \

485
src/mesa/drivers/dri/radeon/radeon_tex.c
View file

@ -173,7 +173,7 @@ static void radeonSetTexFilter( radeonTexObjPtr t, GLenum minf, GLenum magf )
t->pp_txfilter &= ~(RADEON_MIN_FILTER_MASK | RADEON_MAG_FILTER_MASK);
/* r100 chips can't handle mipmaps/aniso for cubemap/volume textures */
if ( t->base.tObj->Target == GL_TEXTURE_CUBE_MAP ) {
if ( t->base.Target == GL_TEXTURE_CUBE_MAP ) {
switch ( minf ) {
case GL_NEAREST:
case GL_NEAREST_MIPMAP_NEAREST:
@ -244,426 +244,6 @@ static void radeonSetTexBorderColor( radeonTexObjPtr t, GLubyte c[4] )
t->pp_border_color = radeonPackColor( 4, c[0], c[1], c[2], c[3] );
}
/**
* Allocate space for and load the mesa images into the texture memory block.
* This will happen before drawing with a new texture, or drawing with a
* texture after it was swapped out or teximaged again.
*/
static radeonTexObjPtr radeonAllocTexObj( struct gl_texture_object *texObj )
{
radeonTexObjPtr t;
t = CALLOC_STRUCT( radeon_tex_obj );
texObj->DriverData = t;
if ( t != NULL ) {
if ( RADEON_DEBUG & DEBUG_TEXTURE ) {
fprintf( stderr, "%s( %p, %p )\n", __FUNCTION__, (void *)texObj, (void *)t );
}
/* Initialize non-image-dependent parts of the state:
*/
t->base.tObj = texObj;
t->border_fallback = GL_FALSE;
t->pp_txfilter = RADEON_BORDER_MODE_OGL;
t->pp_txformat = (RADEON_TXFORMAT_ENDIAN_NO_SWAP |
RADEON_TXFORMAT_PERSPECTIVE_ENABLE);
make_empty_list( & t->base );
radeonSetTexWrap( t, texObj->WrapS, texObj->WrapT );
radeonSetTexMaxAnisotropy( t, texObj->MaxAnisotropy );
radeonSetTexFilter( t, texObj->MinFilter, texObj->MagFilter );
radeonSetTexBorderColor( t, texObj->_BorderChan );
}
return t;
}
static const struct gl_texture_format *
radeonChooseTextureFormat( GLcontext *ctx, GLint internalFormat,
GLenum format, GLenum type )
{
r100ContextPtr rmesa = R100_CONTEXT(ctx);
const GLboolean do32bpt =
( rmesa->radeon.texture_depth == DRI_CONF_TEXTURE_DEPTH_32 );
const GLboolean force16bpt =
( rmesa->radeon.texture_depth == DRI_CONF_TEXTURE_DEPTH_FORCE_16 );
(void) format;
switch ( internalFormat ) {
case 4:
case GL_RGBA:
case GL_COMPRESSED_RGBA:
switch ( type ) {
case GL_UNSIGNED_INT_10_10_10_2:
case GL_UNSIGNED_INT_2_10_10_10_REV:
return do32bpt ? _dri_texformat_argb8888 : _dri_texformat_argb1555;
case GL_UNSIGNED_SHORT_4_4_4_4:
case GL_UNSIGNED_SHORT_4_4_4_4_REV:
return _dri_texformat_argb4444;
case GL_UNSIGNED_SHORT_5_5_5_1:
case GL_UNSIGNED_SHORT_1_5_5_5_REV:
return _dri_texformat_argb1555;
default:
return do32bpt ? _dri_texformat_argb8888 : _dri_texformat_argb4444;
}
case 3:
case GL_RGB:
case GL_COMPRESSED_RGB:
switch ( type ) {
case GL_UNSIGNED_SHORT_4_4_4_4:
case GL_UNSIGNED_SHORT_4_4_4_4_REV:
return _dri_texformat_argb4444;
case GL_UNSIGNED_SHORT_5_5_5_1:
case GL_UNSIGNED_SHORT_1_5_5_5_REV:
return _dri_texformat_argb1555;
case GL_UNSIGNED_SHORT_5_6_5:
case GL_UNSIGNED_SHORT_5_6_5_REV:
return _dri_texformat_rgb565;
default:
return do32bpt ? _dri_texformat_argb8888 : _dri_texformat_rgb565;
}
case GL_RGBA8:
case GL_RGB10_A2:
case GL_RGBA12:
case GL_RGBA16:
return !force16bpt ?
_dri_texformat_argb8888 : _dri_texformat_argb4444;
case GL_RGBA4:
case GL_RGBA2:
return _dri_texformat_argb4444;
case GL_RGB5_A1:
return _dri_texformat_argb1555;
case GL_RGB8:
case GL_RGB10:
case GL_RGB12:
case GL_RGB16:
return !force16bpt ? _dri_texformat_argb8888 : _dri_texformat_rgb565;
case GL_RGB5:
case GL_RGB4:
case GL_R3_G3_B2:
return _dri_texformat_rgb565;
case GL_ALPHA:
case GL_ALPHA4:
case GL_ALPHA8:
case GL_ALPHA12:
case GL_ALPHA16:
case GL_COMPRESSED_ALPHA:
return _dri_texformat_a8;
case 1:
case GL_LUMINANCE:
case GL_LUMINANCE4:
case GL_LUMINANCE8:
case GL_LUMINANCE12:
case GL_LUMINANCE16:
case GL_COMPRESSED_LUMINANCE:
return _dri_texformat_l8;
case 2:
case GL_LUMINANCE_ALPHA:
case GL_LUMINANCE4_ALPHA4:
case GL_LUMINANCE6_ALPHA2:
case GL_LUMINANCE8_ALPHA8:
case GL_LUMINANCE12_ALPHA4:
case GL_LUMINANCE12_ALPHA12:
case GL_LUMINANCE16_ALPHA16:
case GL_COMPRESSED_LUMINANCE_ALPHA:
return _dri_texformat_al88;
case GL_INTENSITY:
case GL_INTENSITY4:
case GL_INTENSITY8:
case GL_INTENSITY12:
case GL_INTENSITY16:
case GL_COMPRESSED_INTENSITY:
return _dri_texformat_i8;
case GL_YCBCR_MESA:
if (type == GL_UNSIGNED_SHORT_8_8_APPLE ||
type == GL_UNSIGNED_BYTE)
return &_mesa_texformat_ycbcr;
else
return &_mesa_texformat_ycbcr_rev;
case GL_RGB_S3TC:
case GL_RGB4_S3TC:
case GL_COMPRESSED_RGB_S3TC_DXT1_EXT:
return &_mesa_texformat_rgb_dxt1;
case GL_COMPRESSED_RGBA_S3TC_DXT1_EXT:
return &_mesa_texformat_rgba_dxt1;
case GL_RGBA_S3TC:
case GL_RGBA4_S3TC:
case GL_COMPRESSED_RGBA_S3TC_DXT3_EXT:
return &_mesa_texformat_rgba_dxt3;
case GL_COMPRESSED_RGBA_S3TC_DXT5_EXT:
return &_mesa_texformat_rgba_dxt5;
default:
_mesa_problem(ctx, "unexpected texture format in %s", __FUNCTION__);
return NULL;
}
return NULL; /* never get here */
}
static void radeonTexImage1D( GLcontext *ctx, GLenum target, GLint level,
GLint internalFormat,
GLint width, GLint border,
GLenum format, GLenum type, const GLvoid *pixels,
const struct gl_pixelstore_attrib *packing,
struct gl_texture_object *texObj,
struct gl_texture_image *texImage )
{
driTextureObject * t = (driTextureObject *) texObj->DriverData;
if ( t ) {
driSwapOutTextureObject( t );
}
else {
t = (driTextureObject *) radeonAllocTexObj( texObj );
if (!t) {
_mesa_error(ctx, GL_OUT_OF_MEMORY, "glTexImage1D");
return;
}
}
/* Note, this will call ChooseTextureFormat */
_mesa_store_teximage1d(ctx, target, level, internalFormat,
width, border, format, type, pixels,
&ctx->Unpack, texObj, texImage);
t->dirty_images[0] |= (1 << level);
}
static void radeonTexSubImage1D( GLcontext *ctx, GLenum target, GLint level,
GLint xoffset,
GLsizei width,
GLenum format, GLenum type,
const GLvoid *pixels,
const struct gl_pixelstore_attrib *packing,
struct gl_texture_object *texObj,
struct gl_texture_image *texImage )
{
driTextureObject * t = (driTextureObject *) texObj->DriverData;
assert( t ); /* this _should_ be true */
if ( t ) {
driSwapOutTextureObject( t );
}
else {
t = (driTextureObject *) radeonAllocTexObj( texObj );
if (!t) {
_mesa_error(ctx, GL_OUT_OF_MEMORY, "glTexSubImage1D");
return;
}
}
_mesa_store_texsubimage1d(ctx, target, level, xoffset, width,
format, type, pixels, packing, texObj,
texImage);
t->dirty_images[0] |= (1 << level);
}
static void radeonTexImage2D( GLcontext *ctx, GLenum target, GLint level,
GLint internalFormat,
GLint width, GLint height, GLint border,
GLenum format, GLenum type, const GLvoid *pixels,
const struct gl_pixelstore_attrib *packing,
struct gl_texture_object *texObj,
struct gl_texture_image *texImage )
{
driTextureObject * t = (driTextureObject *) texObj->DriverData;
GLuint face;
/* which cube face or ordinary 2D image */
switch (target) {
case GL_TEXTURE_CUBE_MAP_POSITIVE_X:
case GL_TEXTURE_CUBE_MAP_NEGATIVE_X:
case GL_TEXTURE_CUBE_MAP_POSITIVE_Y:
case GL_TEXTURE_CUBE_MAP_NEGATIVE_Y:
case GL_TEXTURE_CUBE_MAP_POSITIVE_Z:
case GL_TEXTURE_CUBE_MAP_NEGATIVE_Z:
face = (GLuint) target - (GLuint) GL_TEXTURE_CUBE_MAP_POSITIVE_X;
ASSERT(face < 6);
break;
default:
face = 0;
}
if ( t != NULL ) {
driSwapOutTextureObject( t );
}
else {
t = (driTextureObject *) radeonAllocTexObj( texObj );
if (!t) {
_mesa_error(ctx, GL_OUT_OF_MEMORY, "glTexImage2D");
return;
}
}
/* Note, this will call ChooseTextureFormat */
_mesa_store_teximage2d(ctx, target, level, internalFormat,
width, height, border, format, type, pixels,
&ctx->Unpack, texObj, texImage);
t->dirty_images[face] |= (1 << level);
}
static void radeonTexSubImage2D( GLcontext *ctx, GLenum target, GLint level,
GLint xoffset, GLint yoffset,
GLsizei width, GLsizei height,
GLenum format, GLenum type,
const GLvoid *pixels,
const struct gl_pixelstore_attrib *packing,
struct gl_texture_object *texObj,
struct gl_texture_image *texImage )
{
driTextureObject * t = (driTextureObject *) texObj->DriverData;
GLuint face;
/* which cube face or ordinary 2D image */
switch (target) {
case GL_TEXTURE_CUBE_MAP_POSITIVE_X:
case GL_TEXTURE_CUBE_MAP_NEGATIVE_X:
case GL_TEXTURE_CUBE_MAP_POSITIVE_Y:
case GL_TEXTURE_CUBE_MAP_NEGATIVE_Y:
case GL_TEXTURE_CUBE_MAP_POSITIVE_Z:
case GL_TEXTURE_CUBE_MAP_NEGATIVE_Z:
face = (GLuint) target - (GLuint) GL_TEXTURE_CUBE_MAP_POSITIVE_X;
ASSERT(face < 6);
break;
default:
face = 0;
}
assert( t ); /* this _should_ be true */
if ( t ) {
driSwapOutTextureObject( t );
}
else {
t = (driTextureObject *) radeonAllocTexObj( texObj );
if (!t) {
_mesa_error(ctx, GL_OUT_OF_MEMORY, "glTexSubImage2D");
return;
}
}
_mesa_store_texsubimage2d(ctx, target, level, xoffset, yoffset, width,
height, format, type, pixels, packing, texObj,
texImage);
t->dirty_images[face] |= (1 << level);
}
static void radeonCompressedTexImage2D( GLcontext *ctx, GLenum target, GLint level,
GLint internalFormat,
GLint width, GLint height, GLint border,
GLsizei imageSize, const GLvoid *data,
struct gl_texture_object *texObj,
struct gl_texture_image *texImage )
{
driTextureObject * t = (driTextureObject *) texObj->DriverData;
GLuint face;
/* which cube face or ordinary 2D image */
switch (target) {
case GL_TEXTURE_CUBE_MAP_POSITIVE_X:
case GL_TEXTURE_CUBE_MAP_NEGATIVE_X:
case GL_TEXTURE_CUBE_MAP_POSITIVE_Y:
case GL_TEXTURE_CUBE_MAP_NEGATIVE_Y:
case GL_TEXTURE_CUBE_MAP_POSITIVE_Z:
case GL_TEXTURE_CUBE_MAP_NEGATIVE_Z:
face = (GLuint) target - (GLuint) GL_TEXTURE_CUBE_MAP_POSITIVE_X;
ASSERT(face < 6);
break;
default:
face = 0;
}
if ( t != NULL ) {
driSwapOutTextureObject( t );
}
else {
t = (driTextureObject *) radeonAllocTexObj( texObj );
if (!t) {
_mesa_error(ctx, GL_OUT_OF_MEMORY, "glCompressedTexImage2D");
return;
}
}
/* Note, this will call ChooseTextureFormat */
_mesa_store_compressed_teximage2d(ctx, target, level, internalFormat, width,
height, border, imageSize, data, texObj, texImage);
t->dirty_images[face] |= (1 << level);
}
static void radeonCompressedTexSubImage2D( GLcontext *ctx, GLenum target, GLint level,
GLint xoffset, GLint yoffset,
GLsizei width, GLsizei height,
GLenum format,
GLsizei imageSize, const GLvoid *data,
struct gl_texture_object *texObj,
struct gl_texture_image *texImage )
{
driTextureObject * t = (driTextureObject *) texObj->DriverData;
GLuint face;
/* which cube face or ordinary 2D image */
switch (target) {
case GL_TEXTURE_CUBE_MAP_POSITIVE_X:
case GL_TEXTURE_CUBE_MAP_NEGATIVE_X:
case GL_TEXTURE_CUBE_MAP_POSITIVE_Y:
case GL_TEXTURE_CUBE_MAP_NEGATIVE_Y:
case GL_TEXTURE_CUBE_MAP_POSITIVE_Z:
case GL_TEXTURE_CUBE_MAP_NEGATIVE_Z:
face = (GLuint) target - (GLuint) GL_TEXTURE_CUBE_MAP_POSITIVE_X;
ASSERT(face < 6);
break;
default:
face = 0;
}
assert( t ); /* this _should_ be true */
if ( t ) {
driSwapOutTextureObject( t );
}
else {
t = (driTextureObject *) radeonAllocTexObj( texObj );
if (!t) {
_mesa_error(ctx, GL_OUT_OF_MEMORY, "glCompressedTexSubImage2D");
return;
}
}
_mesa_store_compressed_texsubimage2d(ctx, target, level, xoffset, yoffset, width,
height, format, imageSize, data, texObj, texImage);
t->dirty_images[face] |= (1 << level);
}
#define SCALED_FLOAT_TO_BYTE( x, scale ) \
(((GLuint)((255.0F / scale) * (x))) / 2)
@ -779,40 +359,26 @@ static void radeonTexParameter( GLcontext *ctx, GLenum target,
t->dirty_state = R100_TEX_ALL;
}
static void radeonBindTexture( GLcontext *ctx, GLenum target,
struct gl_texture_object *texObj )
{
if ( RADEON_DEBUG & (DEBUG_STATE|DEBUG_TEXTURE) ) {
fprintf( stderr, "%s( %p ) unit=%d\n", __FUNCTION__, (void *)texObj,
ctx->Texture.CurrentUnit );
}
assert( (target != GL_TEXTURE_1D && target != GL_TEXTURE_2D &&
target != GL_TEXTURE_RECTANGLE_NV && target != GL_TEXTURE_CUBE_MAP) ||
(texObj->DriverData != NULL) );
}
static void radeonDeleteTexture( GLcontext *ctx,
struct gl_texture_object *texObj )
{
r100ContextPtr rmesa = R100_CONTEXT(ctx);
driTextureObject * t = (driTextureObject *) texObj->DriverData;
radeonTexObj* t = radeon_tex_obj(texObj);
if ( RADEON_DEBUG & (DEBUG_STATE|DEBUG_TEXTURE) ) {
fprintf( stderr, "%s( %p (target = %s) )\n", __FUNCTION__, (void *)texObj,
_mesa_lookup_enum_by_nr( texObj->Target ) );
}
if ( t != NULL ) {
if ( rmesa ) {
RADEON_FIREVERTICES( rmesa );
}
driDestroyTextureObject( t );
if ( rmesa ) {
RADEON_FIREVERTICES( rmesa );
}
if (t->mt) {
radeon_miptree_unreference(t->mt);
t->mt = 0;
}
/* Free mipmap images and the texture object itself */
_mesa_delete_texture_object(ctx, texObj);
}
@ -847,16 +413,26 @@ static struct gl_texture_object *
radeonNewTextureObject( GLcontext *ctx, GLuint name, GLenum target )
{
r100ContextPtr rmesa = R100_CONTEXT(ctx);
struct gl_texture_object *obj;
obj = _mesa_new_texture_object(ctx, name, target);
if (!obj)
return NULL;
obj->MaxAnisotropy = rmesa->radeon.initialMaxAnisotropy;
radeonAllocTexObj( obj );
return obj;
radeonTexObj* t = CALLOC_STRUCT(radeon_tex_obj);
_mesa_initialize_texture_object(&t->base, name, target);
t->base.MaxAnisotropy = rmesa->radeon.initialMaxAnisotropy;
t->border_fallback = GL_FALSE;
t->pp_txfilter = RADEON_BORDER_MODE_OGL;
t->pp_txformat = (RADEON_TXFORMAT_ENDIAN_NO_SWAP |
RADEON_TXFORMAT_PERSPECTIVE_ENABLE);
radeonSetTexWrap( t, t->base.WrapS, t->base.WrapT );
radeonSetTexMaxAnisotropy( t, t->base.MaxAnisotropy );
radeonSetTexFilter( t, t->base.MinFilter, t->base.MagFilter );
radeonSetTexBorderColor( t, t->base._BorderChan );
return &t->base;
}
void radeonInitTextureFuncs( struct dd_function_table *functions )
{
functions->ChooseTextureFormat = radeonChooseTextureFormat;
@ -866,7 +442,7 @@ void radeonInitTextureFuncs( struct dd_function_table *functions )
functions->TexSubImage2D = radeonTexSubImage2D;
functions->NewTextureObject = radeonNewTextureObject;
functions->BindTexture = radeonBindTexture;
// functions->BindTexture = radeonBindTexture;
functions->DeleteTexture = radeonDeleteTexture;
functions->IsTextureResident = driIsTextureResident;
@ -877,5 +453,12 @@ void radeonInitTextureFuncs( struct dd_function_table *functions )
functions->CompressedTexImage2D = radeonCompressedTexImage2D;
functions->CompressedTexSubImage2D = radeonCompressedTexSubImage2D;
functions->GenerateMipmap = radeon_generate_mipmap;
functions->NewTextureImage = radeonNewTextureImage;
functions->FreeTexImageData = radeonFreeTexImageData;
functions->MapTexture = radeonMapTexture;
functions->UnmapTexture = radeonUnmapTexture;
driInitTextureFormats();
}