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ac/nir/ngg: Store special MS outputs in attribute ring for PS to read.
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com> Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21409>
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1 changed files with 45 additions and 0 deletions
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@ -4244,6 +4244,36 @@ set_ms_final_output_counts(nir_builder *b,
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*out_num_vtx = nir_load_var(b, s->vertex_count_var);
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}
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static void
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ms_emit_attribute_ring_output_stores(nir_builder *b, const uint64_t outputs_mask,
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lower_ngg_ms_state *s)
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{
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nir_ssa_def *idx = nir_load_local_invocation_index(b);
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nir_ssa_def *ring = nir_load_ring_attr_amd(b);
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nir_ssa_def *off = nir_load_ring_attr_offset_amd(b);
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nir_ssa_def *zero = nir_imm_int(b, 0);
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u_foreach_bit64 (slot, outputs_mask) {
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if (s->vs_output_param_offset[slot] > AC_EXP_PARAM_OFFSET_31)
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continue;
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nir_ssa_def *soffset = nir_iadd_imm(b, off, s->vs_output_param_offset[slot] * 16 * 32);
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nir_ssa_def *store_val = nir_ssa_undef(b, 4, 32);
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unsigned store_val_components = 0;
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for (unsigned c = 0; c < 4; ++c) {
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if (s->outputs[slot][c]) {
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store_val = nir_vector_insert_imm(b, store_val, s->outputs[slot][c], c);
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store_val_components = c + 1;
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}
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}
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store_val = nir_trim_vector(b, store_val, store_val_components);
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nir_store_buffer_amd(b, store_val, ring, zero, soffset, idx,
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.memory_modes = nir_var_shader_out,
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.access = ACCESS_COHERENT | ACCESS_IS_SWIZZLED_AMD);
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}
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}
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static void
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ms_emit_primitive_export(nir_builder *b,
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nir_ssa_def *prim_exp_arg_ch1,
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@ -4288,6 +4318,12 @@ ms_emit_primitive_export(nir_builder *b,
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nir_ssa_def *rate = s->outputs[VARYING_SLOT_PRIMITIVE_SHADING_RATE][0];
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prim_exp_arg_ch2 = nir_ior(b, prim_exp_arg_ch2, rate);
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}
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/* GFX11: also store these to the attribute ring so PS can load them. */
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if (s->gfx_level >= GFX11) {
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ms_emit_attribute_ring_output_stores(b, per_primitive_outputs & export_as_prim_arg_slots,
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s);
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}
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}
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nir_ssa_def *prim_exp_arg = prim_exp_arg_ch2 ?
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@ -4343,6 +4379,15 @@ emit_ms_finale(nir_builder *b, lower_ngg_ms_state *s)
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ac_nir_export_parameters(b, s->vs_output_param_offset, per_vertex_outputs, 0, s->outputs,
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NULL, NULL);
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}
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const uint64_t per_vertex_special = VARYING_BIT_CULL_DIST0 | VARYING_BIT_CULL_DIST1 |
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VARYING_BIT_CLIP_DIST0 | VARYING_BIT_CLIP_DIST1 |
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VARYING_BIT_PSIZ;
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/* GFX11: also store special outputs to the attribute ring so PS can load them. */
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if (s->gfx_level >= GFX11 && (per_vertex_outputs & per_vertex_special)) {
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ms_emit_attribute_ring_output_stores(b, per_vertex_outputs & per_vertex_special, s);
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}
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}
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nir_pop_if(b, if_has_output_vertex);
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