From 59a4f53b955c984e5b5362196ceac7982f3ee6cf Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Tapani=20P=C3=A4lli?= Date: Thu, 18 Sep 2025 08:25:49 +0300 Subject: [PATCH] iris: setup bits for ARB_texture_filter_minmax with gfx9+ MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Tested with: KHR-GL46.texture_filter_minmax_tests.* Signed-off-by: Tapani Pälli Reviewed-by: Lionel Landwerlin Part-of: --- docs/features.txt | 2 +- src/gallium/drivers/iris/iris_screen.c | 1 + src/gallium/drivers/iris/iris_state.c | 24 +++++++++++++++++++++++- 3 files changed, 25 insertions(+), 2 deletions(-) diff --git a/docs/features.txt b/docs/features.txt index 1df524f2daf..277042fd354 100644 --- a/docs/features.txt +++ b/docs/features.txt @@ -316,7 +316,7 @@ Khronos, ARB, and OES extensions that are not part of any OpenGL or OpenGL ES ve GL_ARB_sparse_texture DONE (radeonsi/gfx9+, zink) GL_ARB_sparse_texture2 DONE (radeonsi/gfx9+, zink) GL_ARB_sparse_texture_clamp DONE (radeonsi/gfx9+, zink) - GL_ARB_texture_filter_minmax DONE (freedreno/a6xx, llvmpipe, nvc0/gm200+, zink) + GL_ARB_texture_filter_minmax DONE (freedreno/a6xx, iris/gen9+, llvmpipe, nvc0/gm200+, zink) GL_ARM_shader_framebuffer_fetch_depth_stencil DONE (llvmpipe) GL_EXT_shader_framebuffer_fetch DONE (freedreno/a6xx, iris/gen9+, llvmpipe, panfrost, virgl, zink, asahi, v3d) GL_EXT_shader_framebuffer_fetch_non_coherent DONE (freedreno/a6xx, iris, llvmpipe, panfrost, virgl, zink, asahi, v3d) diff --git a/src/gallium/drivers/iris/iris_screen.c b/src/gallium/drivers/iris/iris_screen.c index 292a293be9f..89b5a1fcf04 100644 --- a/src/gallium/drivers/iris/iris_screen.c +++ b/src/gallium/drivers/iris/iris_screen.c @@ -316,6 +316,7 @@ iris_init_screen_caps(struct iris_screen *screen) caps->texture_multisample = true; caps->cube_map_array = true; caps->texture_buffer_objects = true; + caps->sampler_reduction_minmax_arb = devinfo->ver > 8; caps->query_pipeline_statistics_single = true; caps->texture_query_lod = true; caps->sample_shading = true; diff --git a/src/gallium/drivers/iris/iris_state.c b/src/gallium/drivers/iris/iris_state.c index c9bd99c830e..44a699cdce0 100644 --- a/src/gallium/drivers/iris/iris_state.c +++ b/src/gallium/drivers/iris/iris_state.c @@ -313,6 +313,19 @@ translate_wrap(unsigned pipe_wrap) return map[pipe_wrap]; } +#if GFX_VER > 8 +static uint32_t +translate_tex_filter_mode(unsigned mode) +{ + static const unsigned map[] = { + [PIPE_TEX_REDUCTION_WEIGHTED_AVERAGE] = STD_FILTER, + [PIPE_TEX_REDUCTION_MIN] = MINIMUM, + [PIPE_TEX_REDUCTION_MAX] = MAXIMUM, + }; + return map[mode]; +} +#endif + /** * Allocate space for some indirect state. * @@ -2527,6 +2540,11 @@ fill_sampler_state(uint32_t *sampler_state, mag_img_filter = state->min_img_filter; } +#if GFX_VER > 8 + uint32_t reduction_mode = + translate_tex_filter_mode(state->reduction_mode); +#endif + iris_pack_state(GENX(SAMPLER_STATE), sampler_state, samp) { samp.TCXAddressControlMode = translate_wrap(state->wrap_s); samp.TCYAddressControlMode = translate_wrap(state->wrap_t); @@ -2537,7 +2555,11 @@ fill_sampler_state(uint32_t *sampler_state, samp.MagModeFilter = mag_img_filter; samp.MipModeFilter = translate_mip_filter(state->min_mip_filter); samp.MaximumAnisotropy = RATIO21; - +#if GFX_VER > 8 + samp.ReductionType = reduction_mode; + samp.ReductionTypeEnable = + reduction_mode != PIPE_TEX_REDUCTION_WEIGHTED_AVERAGE; +#endif if (max_anisotropy >= 2) { if (state->min_img_filter == PIPE_TEX_FILTER_LINEAR) { #if GFX_VER >= 30