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r600: proper fix for 1560183536

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PRE_EMIT_STATE_BUFSZ accounts for the start 3d, idle, cd/db flush
not for state.  The relocs for CB_COLOR0_FRAG & CB_COLOR0_TILE
are part of the render target state.
This commit is contained in:
Alex Deucher 2010-02-24 11:43:33 -05:00
parent f9f4f3df42
commit 5997501ca0
2 changed files with 2 additions and 2 deletions
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2
src/mesa/drivers/dri/r600/r700_chip.c
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@ -1349,7 +1349,7 @@ void r600InitAtoms(context_t *context)
ALLOC_STATE(poly, always, 10, r700SendPolyState);
ALLOC_STATE(cb, cb, 18, r700SendCBState);
ALLOC_STATE(clrcmp, always, 6, r700SendCBCLRCMPState);
ALLOC_STATE(cb_target, always, 25, r700SendRenderTargetState);
ALLOC_STATE(cb_target, always, 29, r700SendRenderTargetState);
ALLOC_STATE(blnd, blnd, (6 + (R700_MAX_RENDER_TARGETS * 3)), r700SendCBBlendState);
ALLOC_STATE(blnd_clr, always, 6, r700SendCBBlendColorState);
ALLOC_STATE(sx, always, 9, r700SendSXState);

2
src/mesa/drivers/dri/r600/r700_render.c
View file

@ -419,7 +419,7 @@ static void r700RunRenderPrimitiveImmediate(GLcontext * ctx, int start, int end,
}
/* start 3d, idle, cb/db flush */
#define PRE_EMIT_STATE_BUFSZ 5 + 5 + 18
#define PRE_EMIT_STATE_BUFSZ 5 + 5 + 14
static GLuint r700PredictRenderSize(GLcontext* ctx,
const struct _mesa_prim *prim,