diff --git a/src/intel/common/intel_batch_decoder.c b/src/intel/common/intel_batch_decoder.c
index 126a6e946c3..1135bece5cb 100644
--- a/src/intel/common/intel_batch_decoder.c
+++ b/src/intel/common/intel_batch_decoder.c
@@ -22,7 +22,7 @@
  */
 
 #include "common/intel_decoder.h"
-#include "intel_disasm.h"
+#include "compiler/brw_disasm.h"
 #include "util/macros.h"
 #include "util/u_debug.h"
 #include "util/u_dynarray.h"
@@ -161,10 +161,10 @@ ctx_disassemble_program(struct intel_batch_decode_ctx *ctx,
       return;
 
    fprintf(ctx->fp, "\nReferenced %s:\n", name);
-   intel_disassemble(ctx->isa, bo.map, 0, ctx->fp);
+   brw_disassemble_with_errors(ctx->isa, bo.map, 0, ctx->fp);
 
    if (ctx->shader_binary) {
-      int size = intel_disassemble_find_end(ctx->isa, bo.map, 0);
+      int size = brw_disassemble_find_end(ctx->isa, bo.map, 0);
 
       ctx->shader_binary(ctx->user_data, short_name, addr,
                          bo.map, size);
diff --git a/src/intel/common/intel_disasm.c b/src/intel/common/intel_disasm.c
deleted file mode 100644
index 49ed7673e91..00000000000
--- a/src/intel/common/intel_disasm.c
+++ /dev/null
@@ -1,111 +0,0 @@
-/*
- * Copyright © 2014 Intel Corporation
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the "Software"),
- * to deal in the Software without restriction, including without limitation
- * the rights to use, copy, modify, merge, publish, distribute, sublicense,
- * and/or sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice (including the next
- * paragraph) shall be included in all copies or substantial portions of the
- * Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
- * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
- * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
- * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
- * IN THE SOFTWARE.
- */
-
-#include <stdlib.h>
-
-#include "compiler/brw_inst.h"
-#include "compiler/brw_disasm.h"
-#include "compiler/brw_disasm_info.h"
-#include "compiler/brw_eu.h"
-#include "compiler/brw_isa_info.h"
-
-#include "intel_disasm.h"
-
-static bool
-is_send(uint32_t opcode)
-{
-   return (opcode == BRW_OPCODE_SEND  ||
-           opcode == BRW_OPCODE_SENDC ||
-           opcode == BRW_OPCODE_SENDS ||
-           opcode == BRW_OPCODE_SENDSC );
-}
-
-int
-intel_disassemble_find_end(const struct brw_isa_info *isa,
-                           const void *assembly, int start)
-{
-   const struct intel_device_info *devinfo = isa->devinfo;
-   int offset = start;
-
-   /* This loop exits when send-with-EOT or when opcode is 0 */
-   while (true) {
-      const brw_inst *insn = assembly + offset;
-
-      if (brw_inst_cmpt_control(devinfo, insn)) {
-         offset += 8;
-      } else {
-         offset += 16;
-      }
-
-      /* Simplistic, but efficient way to terminate disasm */
-      uint32_t opcode = brw_inst_opcode(isa, insn);
-      if (opcode == 0 || (is_send(opcode) && brw_inst_eot(devinfo, insn))) {
-         break;
-      }
-   }
-
-   return offset;
-}
-
-void
-intel_disassemble(const struct brw_isa_info *isa,
-                  const void *assembly, int start, FILE *out)
-{
-   int end = intel_disassemble_find_end(isa, assembly, start);
-
-   /* Make a dummy disasm structure that brw_validate_instructions
-    * can work from.
-    */
-   struct disasm_info *disasm_info = disasm_initialize(isa, NULL);
-   disasm_new_inst_group(disasm_info, start);
-   disasm_new_inst_group(disasm_info, end);
-
-   brw_validate_instructions(isa, assembly, start, end, disasm_info);
-
-   void *mem_ctx = ralloc_context(NULL);
-   const struct brw_label *root_label =
-      brw_label_assembly(isa, assembly, start, end, mem_ctx);
-
-   foreach_list_typed(struct inst_group, group, link,
-                      &disasm_info->group_list) {
-      struct exec_node *next_node = exec_node_get_next(&group->link);
-      if (exec_node_is_tail_sentinel(next_node))
-         break;
-
-      struct inst_group *next =
-         exec_node_data(struct inst_group, next_node, link);
-
-      int start_offset = group->offset;
-      int end_offset = next->offset;
-
-      brw_disassemble(isa, assembly, start_offset, end_offset,
-                      root_label, out);
-
-      if (group->error) {
-         fputs(group->error, out);
-      }
-   }
-
-   ralloc_free(mem_ctx);
-   ralloc_free(disasm_info);
-}
diff --git a/src/intel/common/intel_disasm.h b/src/intel/common/intel_disasm.h
deleted file mode 100644
index 756fc0380aa..00000000000
--- a/src/intel/common/intel_disasm.h
+++ /dev/null
@@ -1,44 +0,0 @@
-/*
- * Copyright © 2014 Intel Corporation
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the "Software"),
- * to deal in the Software without restriction, including without limitation
- * the rights to use, copy, modify, merge, publish, distribute, sublicense,
- * and/or sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice (including the next
- * paragraph) shall be included in all copies or substantial portions of the
- * Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
- * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
- * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
- * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
- * IN THE SOFTWARE.
- */
-
-#ifndef INTEL_DISASM_H
-#define INTEL_DISASM_H
-
-#include "intel/dev/intel_device_info.h"
-#include "compiler/brw_isa_info.h"
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-int intel_disassemble_find_end(const struct brw_isa_info *isa,
-                               const void *assembly, int start);
-
-void intel_disassemble(const struct brw_isa_info *isa,
-                       const void *assembly, int start, FILE *out);
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif /* INTEL_DISASM_H */
diff --git a/src/intel/common/meson.build b/src/intel/common/meson.build
index 9ca00e01dad..d109696969f 100644
--- a/src/intel/common/meson.build
+++ b/src/intel/common/meson.build
@@ -37,8 +37,6 @@ files_libintel_common = files(
   'intel_bind_timeline.h',
   'intel_buffer_alloc.h',
   'intel_decoder.h',
-  'intel_disasm.c',
-  'intel_disasm.h',
   'intel_engine.c',
   'intel_engine.h',
   'intel_gem.c',
diff --git a/src/intel/compiler/brw_disasm.c b/src/intel/compiler/brw_disasm.c
index b399a4b3bcb..9611083678a 100644
--- a/src/intel/compiler/brw_disasm.c
+++ b/src/intel/compiler/brw_disasm.c
@@ -1,5 +1,6 @@
 /*
  * Copyright © 2008 Keith Packard
+ * Copyright © 2014 Intel Corporation
  *
  * Permission to use, copy, modify, distribute, and sell this software and its
  * documentation for any purpose is hereby granted without fee, provided that
@@ -20,17 +21,19 @@
  * OF THIS SOFTWARE.
  */
 
-#include <stdio.h>
-#include <string.h>
 #include <stdarg.h>
+#include <stdio.h>
+#include <stdlib.h>
+#include <string.h>
 
 #include "brw_disasm.h"
+#include "brw_disasm_info.h"
 #include "brw_eu_defines.h"
-#include "brw_inst.h"
-#include "brw_shader.h"
-#include "brw_reg.h"
-#include "brw_inst.h"
 #include "brw_eu.h"
+#include "brw_inst.h"
+#include "brw_isa_info.h"
+#include "brw_reg.h"
+#include "brw_shader.h"
 #include "util/half_float.h"
 
 bool
@@ -2811,3 +2814,73 @@ brw_disassemble_inst(FILE *file, const struct brw_isa_info *isa,
    newline(file);
    return err;
 }
+
+int
+brw_disassemble_find_end(const struct brw_isa_info *isa,
+                         const void *assembly, int start)
+{
+   const struct intel_device_info *devinfo = isa->devinfo;
+   int offset = start;
+
+   /* This loop exits when send-with-EOT or when opcode is 0 */
+   while (true) {
+      const brw_inst *insn = assembly + offset;
+
+      if (brw_inst_cmpt_control(devinfo, insn)) {
+         offset += 8;
+      } else {
+         offset += 16;
+      }
+
+      /* Simplistic, but efficient way to terminate disasm */
+      uint32_t opcode = brw_inst_opcode(isa, insn);
+      if (opcode == 0 || (is_send(opcode) && brw_inst_eot(devinfo, insn))) {
+         break;
+      }
+   }
+
+   return offset;
+}
+
+void
+brw_disassemble_with_errors(const struct brw_isa_info *isa,
+                            const void *assembly, int start, FILE *out)
+{
+   int end = brw_disassemble_find_end(isa, assembly, start);
+
+   /* Make a dummy disasm structure that brw_validate_instructions
+    * can work from.
+    */
+   struct disasm_info *disasm_info = disasm_initialize(isa, NULL);
+   disasm_new_inst_group(disasm_info, start);
+   disasm_new_inst_group(disasm_info, end);
+
+   brw_validate_instructions(isa, assembly, start, end, disasm_info);
+
+   void *mem_ctx = ralloc_context(NULL);
+   const struct brw_label *root_label =
+      brw_label_assembly(isa, assembly, start, end, mem_ctx);
+
+   foreach_list_typed(struct inst_group, group, link,
+                      &disasm_info->group_list) {
+      struct exec_node *next_node = exec_node_get_next(&group->link);
+      if (exec_node_is_tail_sentinel(next_node))
+         break;
+
+      struct inst_group *next =
+         exec_node_data(struct inst_group, next_node, link);
+
+      int start_offset = group->offset;
+      int end_offset = next->offset;
+
+      brw_disassemble(isa, assembly, start_offset, end_offset,
+                      root_label, out);
+
+      if (group->error) {
+         fputs(group->error, out);
+      }
+   }
+
+   ralloc_free(mem_ctx);
+   ralloc_free(disasm_info);
+}
diff --git a/src/intel/compiler/brw_disasm.h b/src/intel/compiler/brw_disasm.h
index 4c71b5826f3..3ebfcfd3051 100644
--- a/src/intel/compiler/brw_disasm.h
+++ b/src/intel/compiler/brw_disasm.h
@@ -30,6 +30,10 @@ void brw_disassemble_with_labels(const struct brw_isa_info *isa,
 void brw_disassemble(const struct brw_isa_info *isa,
                      const void *assembly, int start, int end,
                      const struct brw_label *root_label, FILE *out);
+int brw_disassemble_find_end(const struct brw_isa_info *isa,
+                             const void *assembly, int start);
+void brw_disassemble_with_errors(const struct brw_isa_info *isa,
+                                 const void *assembly, int start, FILE *out);
 
 #ifdef __cplusplus
 } /* extern "C" */
diff --git a/src/intel/compiler/intel_clc.c b/src/intel/compiler/intel_clc.c
index 42a6741b63b..1479f3e556a 100644
--- a/src/intel/compiler/intel_clc.c
+++ b/src/intel/compiler/intel_clc.c
@@ -23,7 +23,7 @@
 
 #include "brw_compiler.h"
 #include "brw_kernel.h"
-#include "common/intel_disasm.h"
+#include "compiler/brw_disasm.h"
 #include "compiler/clc/clc.h"
 #include "compiler/glsl_types.h"
 #include "compiler/nir/nir_serialize.h"
@@ -247,7 +247,7 @@ print_kernel(FILE *fp, const char *prefix,
 
    fprintf(fp, "#if 0  /* BEGIN KERNEL ASSEMBLY */\n");
    fprintf(fp, "\n");
-   intel_disassemble(isa, kernel->code, 0, fp);
+   brw_disassemble_with_errors(isa, kernel->code, 0, fp);
    fprintf(fp, "\n");
    fprintf(fp, "#endif /* END KERNEL ASSEMBLY */\n");
    print_u32_data(fp, prefix, "code", kernel->code,
diff --git a/src/intel/tools/aubinator_viewer.cpp b/src/intel/tools/aubinator_viewer.cpp
index 01c339c598d..6850d478480 100644
--- a/src/intel/tools/aubinator_viewer.cpp
+++ b/src/intel/tools/aubinator_viewer.cpp
@@ -39,7 +39,8 @@
 #include "aub_read.h"
 #include "aub_mem.h"
 
-#include "common/intel_disasm.h"
+#include "compiler/brw_disasm.h"
+#include "compiler/brw_isa_info.h"
 
 #define xtzalloc(name) ((decltype(&name)) calloc(1, sizeof(name)))
 #define xtalloc(name) ((decltype(&name)) malloc(sizeof(name)))
@@ -394,9 +395,9 @@ new_shader_window(struct aub_mem *mem, uint64_t address, const char *desc)
    if (shader_bo.map) {
       FILE *f = open_memstream(&window->shader, &window->shader_size);
       if (f) {
-         intel_disassemble(&context.file->isa,
-                           (const uint8_t *) shader_bo.map +
-                           (address - shader_bo.addr), 0, f);
+         brw_disassemble_with_errors(&context.file->isa,
+                                     (const uint8_t *) shader_bo.map +
+                                     (address - shader_bo.addr), 0, f);
          fclose(f);
       }
    }
diff --git a/src/intel/tools/aubinator_viewer.h b/src/intel/tools/aubinator_viewer.h
index 7323cd5c182..70de8dd585b 100644
--- a/src/intel/tools/aubinator_viewer.h
+++ b/src/intel/tools/aubinator_viewer.h
@@ -4,7 +4,7 @@
 #include "imgui/imgui.h"
 
 #include "common/intel_decoder.h"
-#include "common/intel_disasm.h"
+#include "compiler/brw_disasm.h"
 
 struct aub_viewer_cfg {
    ImColor clear_color;
diff --git a/src/intel/tools/intel_hang_replay.c b/src/intel/tools/intel_hang_replay.c
index f9a6a4f0de3..1b6de804b32 100644
--- a/src/intel/tools/intel_hang_replay.c
+++ b/src/intel/tools/intel_hang_replay.c
@@ -42,9 +42,10 @@
 
 #include <xf86drm.h>
 
-#include "common/intel_disasm.h"
 #include "common/intel_gem.h"
 #include "common/intel_hang_dump.h"
+#include "compiler/brw_disasm.h"
+#include "compiler/brw_isa_info.h"
 #include "dev/intel_device_info.h"
 
 #include "drm-uapi/i915_drm.h"
@@ -417,9 +418,9 @@ main(int argc, char *argv[])
                  (bo->file_offset - aligned_offset), (*addr - bo->offset));
          struct brw_isa_info _isa, *isa = &_isa;
          brw_init_isa_info(isa, &devinfo);
-         intel_disassemble(isa,
-                           map + (bo->file_offset - aligned_offset) + (*addr - bo->offset),
-                           0, stderr);
+         brw_disassemble_with_errors(isa,
+                                     map + (bo->file_offset - aligned_offset) + (*addr - bo->offset),
+                                     0, stderr);
 
          munmap(map, remaining_length);
       }
diff --git a/src/intel/tools/intel_hang_viewer.cpp b/src/intel/tools/intel_hang_viewer.cpp
index eca20044ef6..1e353cbe260 100644
--- a/src/intel/tools/intel_hang_viewer.cpp
+++ b/src/intel/tools/intel_hang_viewer.cpp
@@ -41,8 +41,9 @@
 #include "util/list.h"
 #include "util/macros.h"
 
-#include "common/intel_disasm.h"
 #include "common/intel_hang_dump.h"
+#include "compiler/brw_disasm.h"
+#include "compiler/brw_isa_info.h"
 
 /* Data */
 
@@ -222,9 +223,9 @@ public:
          size_t shader_txt_size = 0;
          FILE *f = open_memstream(&shader_txt, &shader_txt_size);
          if (f) {
-            intel_disassemble(&context.isa,
-                              (const uint8_t *) bo->map +
-                              (address - bo->offset), 0, f);
+            brw_disassemble_with_errors(&context.isa,
+                                        (const uint8_t *) bo->map +
+                                        (address - bo->offset), 0, f);
             fclose(f);
          }
 
diff --git a/src/intel/vulkan/anv_pipeline.c b/src/intel/vulkan/anv_pipeline.c
index 2220e5eb89d..1fd4957818c 100644
--- a/src/intel/vulkan/anv_pipeline.c
+++ b/src/intel/vulkan/anv_pipeline.c
@@ -30,8 +30,8 @@
 #include "util/mesa-sha1.h"
 #include "util/os_time.h"
 #include "common/intel_l3_config.h"
-#include "common/intel_disasm.h"
 #include "common/intel_sample_positions.h"
+#include "compiler/brw_disasm.h"
 #include "anv_private.h"
 #include "compiler/brw_nir.h"
 #include "compiler/brw_nir_rt.h"
@@ -1666,8 +1666,8 @@ anv_pipeline_add_executable(struct anv_pipeline *pipeline,
       /* Creating this is far cheaper than it looks.  It's perfectly fine to
        * do it for every binary.
        */
-      intel_disassemble(&pipeline->device->physical->compiler->isa,
-                        stage->code, code_offset, stream);
+      brw_disassemble_with_errors(&pipeline->device->physical->compiler->isa,
+                                  stage->code, code_offset, stream);
 
       fclose(stream);
 
diff --git a/src/intel/vulkan_hasvk/anv_pipeline.c b/src/intel/vulkan_hasvk/anv_pipeline.c
index 8c2b2d6db8f..f85ce50d041 100644
--- a/src/intel/vulkan_hasvk/anv_pipeline.c
+++ b/src/intel/vulkan_hasvk/anv_pipeline.c
@@ -30,8 +30,8 @@
 #include "util/mesa-sha1.h"
 #include "util/os_time.h"
 #include "common/intel_l3_config.h"
-#include "common/intel_disasm.h"
 #include "common/intel_sample_positions.h"
+#include "compiler/brw_disasm.h"
 #include "anv_private.h"
 #include "compiler/brw_nir.h"
 #include "compiler/brw_nir_rt.h"
@@ -1035,8 +1035,8 @@ anv_pipeline_add_executable(struct anv_pipeline *pipeline,
       /* Creating this is far cheaper than it looks.  It's perfectly fine to
        * do it for every binary.
        */
-      intel_disassemble(&pipeline->device->physical->compiler->isa,
-                        stage->code, code_offset, stream);
+      brw_disassemble_with_errors(&pipeline->device->physical->compiler->isa,
+                                  stage->code, code_offset, stream);
 
       fclose(stream);