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spirv: Allow [i/u]mulExtended to use new nir opcode

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Use new nir opcode nir_[i/u]mul_2x32_64 and extract lower and higher 32
bits as needed instead of emitting mul and mul_high.

v2: Surround the switch case with curly braces (Jason Ekstrand)

Signed-off-by: Sagar Ghuge <sagar.ghuge@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
This commit is contained in:
Sagar Ghuge 2019-02-25 14:56:29 -08:00
parent 47ec9bdc60
commit 58bcebd987
1 changed files with 10 additions and 6 deletions
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16
src/compiler/spirv/vtn_alu.c
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@ -465,17 +465,21 @@ vtn_handle_alu(struct vtn_builder *b, SpvOp opcode,
val->ssa->elems[1]->def = nir_usub_borrow(&b->nb, src[0], src[1]); val->ssa->elems[1]->def = nir_usub_borrow(&b->nb, src[0], src[1]);
break; break;
case SpvOpUMulExtended: case SpvOpUMulExtended: {
vtn_assert(glsl_type_is_struct(val->ssa->type)); vtn_assert(glsl_type_is_struct(val->ssa->type));
val->ssa->elems[0]->def = nir_imul(&b->nb, src[0], src[1]); nir_ssa_def *umul = nir_umul_2x32_64(&b->nb, src[0], src[1]);
val->ssa->elems[1]->def = nir_umul_high(&b->nb, src[0], src[1]); val->ssa->elems[0]->def = nir_unpack_64_2x32_split_x(&b->nb, umul);
val->ssa->elems[1]->def = nir_unpack_64_2x32_split_y(&b->nb, umul);
break; break;
}
case SpvOpSMulExtended: case SpvOpSMulExtended: {
vtn_assert(glsl_type_is_struct(val->ssa->type)); vtn_assert(glsl_type_is_struct(val->ssa->type));
val->ssa->elems[0]->def = nir_imul(&b->nb, src[0], src[1]); nir_ssa_def *smul = nir_imul_2x32_64(&b->nb, src[0], src[1]);
val->ssa->elems[1]->def = nir_imul_high(&b->nb, src[0], src[1]); val->ssa->elems[0]->def = nir_unpack_64_2x32_split_x(&b->nb, smul);
val->ssa->elems[1]->def = nir_unpack_64_2x32_split_y(&b->nb, smul);
break; break;
}
case SpvOpFwidth: case SpvOpFwidth:
val->ssa->def = nir_fadd(&b->nb, val->ssa->def = nir_fadd(&b->nb,