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agx: handle rgb32 residency queries

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so silly.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33682>
This commit is contained in:
Alyssa Rosenzweig 2025-02-21 11:59:57 -05:00 • committed by Marge Bot
parent 839b01bd2d
commit 583978a8ee
1 changed files with 18 additions and 3 deletions
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21
src/asahi/compiler/agx_nir_lower_texture.c
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@ -18,6 +18,9 @@
#include "nir_intrinsics_indices.h"
#include "shader_enums.h"
/* Residency flags are inverted from NIR */
#define AGX_RESIDENT (0)
static bool
fence_image(struct nir_builder *b, nir_intrinsic_instr *intr, void *data)
{
@ -156,7 +159,18 @@ lower_buffer_texture(nir_builder *b, nir_tex_instr *tex)
nir_def *rgb32 = nir_trim_vector(
b, libagx_texture_load_rgb32(b, desc, coord, nir_imm_bool(b, is_float)),
nir_tex_instr_dest_size(tex));
nir_tex_instr_result_size(tex));
/* Raw loads do not return residency information, but residency queries are
* supported on buffer textures. Fortunately, we do not need to support
* sparse RGB32 buffers, so we simply claim all RGB32 loads were resident.
* Nothing should hit this in practice, but if we don't do *something* here
* we'll get vector size mismatches which blow up in vkd3d-proton.
*/
if (tex->is_sparse) {
rgb32 = nir_pad_vector_imm_int(b, rgb32, AGX_RESIDENT,
rgb32->num_components + 1);
}
nir_push_else(b, nif);
@ -658,8 +672,9 @@ lower_images(nir_builder *b, nir_intrinsic_instr *intr, UNUSED void *data)
/* Residency information is in bit 0, so we need to mask. Unclear what's
* in the upper bits. For now, let's match the blob.
*/
nir_def_replace(&intr->def,
nir_ieq_imm(b, nir_iand_imm(b, intr->src[0].ssa, 1), 0));
nir_def_replace(
&intr->def,
nir_ieq_imm(b, nir_iand_imm(b, intr->src[0].ssa, 1), AGX_RESIDENT));
return true;
case nir_intrinsic_sparse_residency_code_and: