anv/brw: add conservative raster on/off to FS_CONFIG

FullyCovered will need to know if conservative rasterization is enabled,
so pass it on to the shader.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Tested-by: Caleb Callaway <caleb.callaway@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38879>

src/intel/compiler/brw/brw_compile_fs.cpp

@@ -1545,6 +1545,9 @@ brw_compile_fs(const struct brw_compiler *compiler,
       if (prog_data->coarse_pixel_dispatch == INTEL_ALWAYS)
          f |= INTEL_FS_CONFIG_COARSE_RT_WRITES;
 
+      if (key->conservative_raster == INTEL_ALWAYS)
+         f |= INTEL_FS_CONFIG_CONSERVATIVE_RASTER;
+
       BRW_NIR_PASS(nir_inline_sysval, nir_intrinsic_load_fs_config_intel, f);
    }
 

src/intel/compiler/brw/brw_compiler.h

@@ -390,10 +390,15 @@ struct brw_fs_prog_key {
    /* Is provoking vertex last? */
    enum intel_sometimes provoking_vertex_last:2;
 
+   /* If the shader reads FullyCovered, we need to know if conservative
+    * rasterization is on, which may be dynamic.
+    */
+   enum intel_sometimes conservative_raster:2;
+
    bool ignore_sample_mask_out:1;
    bool coarse_pixel:1;
    bool api_sample_shading:1;
-   unsigned pad:13;
+   unsigned pad:11;
 };
 
 static inline bool
@@ -405,6 +410,7 @@ brw_fs_prog_key_is_dynamic(const struct brw_fs_prog_key *key)
       key->alpha_to_coverage == INTEL_SOMETIMES ||
       key->persample_interp == INTEL_SOMETIMES ||
       key->multisample_fbo == INTEL_SOMETIMES ||
+      key->conservative_raster == INTEL_SOMETIMES ||
       key->base.vue_layout == INTEL_VUE_LAYOUT_SEPARATE_MESH;
 }
 
@@ -625,6 +631,12 @@ struct brw_fs_prog_data {
     */
    enum intel_sometimes provoking_vertex_last;
 
+   /**
+    * If the fragment shader reads FullyCovered, it needs to know what the
+    * state of conservative rasterization is.
+    */
+   enum intel_sometimes conservative_raster;
+
    /**
     * Push constant location of intel_fs_config (dynamic configuration of the
     * pixel shader) in bytes.
@@ -687,7 +699,8 @@ brw_fs_prog_data_is_dynamic(const struct brw_fs_prog_data *prog_data)
        prog_data->provoking_vertex_last == INTEL_SOMETIMES) ||
       prog_data->alpha_to_coverage == INTEL_SOMETIMES ||
       prog_data->coarse_pixel_dispatch == INTEL_SOMETIMES ||
-      prog_data->persample_dispatch == INTEL_SOMETIMES;
+      prog_data->persample_dispatch == INTEL_SOMETIMES ||
+      prog_data->conservative_raster == INTEL_SOMETIMES;
 }
 
 #ifdef GFX_VERx10

src/intel/compiler/intel_shader_enums.h

@@ -114,6 +114,9 @@ enum intel_fs_config {
    /** True if we need to apply Wa_18019110168 remapping */
    INTEL_FS_CONFIG_PER_PRIMITIVE_REMAPPING = (1 << 6),
 
+   /** True if conservative rasterization is enabled */
+   INTEL_FS_CONFIG_CONSERVATIVE_RASTER = (1 << 7),
+
    /** True if this shader has been dispatched coarse
     *
     * This is intentionally chose to be bit 15 to correspond to the coarse bit
@@ -543,6 +546,7 @@ struct intel_fs_params {
    uint32_t first_vue_slot;
    uint32_t primitive_id_index;
    bool per_primitive_remapping;
+   bool conservative_raster;
 };
 
 static inline enum intel_fs_config
@@ -588,6 +592,9 @@ intel_fs_config(struct intel_fs_params params)
    if (params.per_primitive_remapping)
       fs_config |= INTEL_FS_CONFIG_PER_PRIMITIVE_REMAPPING;
 
+   if (params.conservative_raster)
+      fs_config |= INTEL_FS_CONFIG_CONSERVATIVE_RASTER;
+
    return fs_config;
 }
 

src/intel/vulkan/anv_shader_compile.c

@@ -553,6 +553,16 @@ populate_fs_prog_key(struct brw_fs_prog_key *key,
       key->provoking_vertex_last = INTEL_NEVER;
    }
 
+   if (state != NULL && state->rs != NULL) {
+      key->conservative_raster =
+         BITSET_TEST(state->dynamic, MESA_VK_DYNAMIC_RS_CONSERVATIVE_MODE) ?
+         INTEL_SOMETIMES :
+         state->rs->conservative_mode == VK_CONSERVATIVE_RASTERIZATION_MODE_DISABLED_EXT ?
+         INTEL_NEVER : INTEL_ALWAYS;
+   } else {
+      key->conservative_raster = INTEL_SOMETIMES;
+   }
+
    key->mesh_input =
       (link_stages & VK_SHADER_STAGE_VERTEX_BIT) ? INTEL_NEVER :
       (link_stages & VK_SHADER_STAGE_MESH_BIT_EXT) ? INTEL_ALWAYS :

src/intel/vulkan/genX_gfx_state.c

@@ -873,6 +873,7 @@ update_fs_config(struct anv_gfx_dynamic_state *hw_state,
             .per_primitive_remapping   = mesh_prog_data &&
                                          mesh_prog_data->map.wa_18019110168_active,
 #endif
+            .conservative_raster       = dyn->rs.conservative_mode != VK_CONSERVATIVE_RASTERIZATION_MODE_DISABLED_EXT,
          });
 
    SET(FS_CONFIG, fs_config, fs_config);
@@ -2328,6 +2329,7 @@ cmd_buffer_flush_gfx_runtime_state(struct anv_gfx_dynamic_state *hw_state,
        BITSET_TEST(dyn->dirty, MESA_VK_DYNAMIC_MS_ALPHA_TO_COVERAGE_ENABLE) ||
        BITSET_TEST(dyn->dirty, MESA_VK_DYNAMIC_MS_RASTERIZATION_SAMPLES) ||
        BITSET_TEST(dyn->dirty, MESA_VK_DYNAMIC_RS_PROVOKING_VERTEX) ||
+       BITSET_TEST(dyn->dirty, MESA_VK_DYNAMIC_RS_CONSERVATIVE_MODE) ||
        BITSET_TEST(dyn->dirty, MESA_VK_DYNAMIC_FSR))
       update_fs_config(hw_state, dyn, gfx);