From 57decad9768a445de23d093cc8e004269a352b50 Mon Sep 17 00:00:00 2001 From: Francisco Jerez Date: Fri, 29 Sep 2023 14:11:39 -0700 Subject: [PATCH] intel/xehp: Enable TBIMR by default. Reviewed-by: Lionel Landwerlin Part-of: --- src/gallium/drivers/iris/driinfo_iris.h | 2 +- src/intel/vulkan/anv_device.c | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/src/gallium/drivers/iris/driinfo_iris.h b/src/gallium/drivers/iris/driinfo_iris.h index 2ebb9aaa7c9..aead4bc1186 100644 --- a/src/gallium/drivers/iris/driinfo_iris.h +++ b/src/gallium/drivers/iris/driinfo_iris.h @@ -12,7 +12,7 @@ DRI_CONF_SECTION_END DRI_CONF_SECTION_PERFORMANCE DRI_CONF_ADAPTIVE_SYNC(true) DRI_CONF_OPT_E(bo_reuse, 1, 0, 1, "Buffer object reuse",) - DRI_CONF_OPT_B(intel_tbimr, false, "Enable TBIMR tiled rendering") + DRI_CONF_OPT_B(intel_tbimr, true, "Enable TBIMR tiled rendering") DRI_CONF_SECTION_END DRI_CONF_SECTION_QUALITY diff --git a/src/intel/vulkan/anv_device.c b/src/intel/vulkan/anv_device.c index b7596d3a46e..9b83a07d75e 100644 --- a/src/intel/vulkan/anv_device.c +++ b/src/intel/vulkan/anv_device.c @@ -88,7 +88,7 @@ static const driOptionDescription anv_dri_options[] = { DRI_CONF_ANV_QUERY_COPY_WITH_SHADER_THRESHOLD(6) DRI_CONF_ANV_FORCE_INDIRECT_DESCRIPTORS(false) DRI_CONF_SHADER_SPILLING_RATE(0) - DRI_CONF_OPT_B(intel_tbimr, false, "Enable TBIMR tiled rendering") + DRI_CONF_OPT_B(intel_tbimr, true, "Enable TBIMR tiled rendering") DRI_CONF_SECTION_END DRI_CONF_SECTION_DEBUG