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intel/brw: Fix validation of accumulator register

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The `stride` and `offset` attributes are meaningful for the "virtual"
register files (VGRFs, UNIFORMs and ATTRs).  Accumulator is an ARF so
validation should check `hstride` (part of the <V,W,H> triple) and `subnr`
instead.

Fixes: 12d7aaf2b8 ("intel/compiler: add more validation for acc register usage")
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28059>
(cherry picked from commit e324fbbe68)
This commit is contained in:
Caio Oliveira 2024-03-07 13:58:55 -08:00 • committed by Eric Engestrom
parent 9909b84f5b
commit 57d1d40413
2 changed files with 3 additions and 3 deletions
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2
.pick_status.json
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@ -474,7 +474,7 @@
"description": "intel/brw: Fix validation of accumulator register",
"nominated": true,
"nomination_type": 1,
"resolution": 0,
"resolution": 1,
"main_sha": null,
"because_sha": "12d7aaf2b825fe49277b84a605733e8fc39e241d",
"notes": null

4
src/intel/compiler/brw_fs_validate.cpp
View file

@ -191,8 +191,8 @@ fs_visitor::validate()
*/
if (intel_needs_workaround(devinfo, 14014617373) &&
inst->dst.is_accumulator() &&
inst->dst.offset == 0) {
fsv_assert_eq(inst->dst.stride, 1);
phys_subnr(devinfo, inst->dst.as_brw_reg()) == 0) {
fsv_assert_eq(inst->dst.hstride, 1);
}
}
}