diff --git a/src/amd/vulkan/radv_cmd_buffer.c b/src/amd/vulkan/radv_cmd_buffer.c index 4fc3c11aa4e..aa0b3ad4066 100644 --- a/src/amd/vulkan/radv_cmd_buffer.c +++ b/src/amd/vulkan/radv_cmd_buffer.c @@ -1652,19 +1652,6 @@ radv_emit_fb_color_state(struct radv_cmd_buffer *cmd_buffer, cb_color_info &= C_028C70_FMASK_COMPRESS_1FRAG_ONLY; } - if (radv_image_has_fmask(image) && - (radv_is_fmask_decompress_pipeline(cmd_buffer) || - radv_is_hw_resolve_pipeline(cmd_buffer))) { - /* Make sure FMASK is enabled if it has been cleared because: - * - * 1) it's required for FMASK_DECOMPRESS operations to avoid - * GPU hangs - * 2) it's necessary for CB_RESOLVE which can read compressed - * FMASK data anyways. - */ - cb_color_info |= S_028C70_COMPRESSION(1); - } - if (cmd_buffer->device->physical_device->rad_info.chip_class >= GFX10) { radeon_set_context_reg_seq(cmd_buffer->cs, R_028C60_CB_COLOR0_BASE + index * 0x3c, 11); radeon_emit(cmd_buffer->cs, cb->cb_color_base); diff --git a/src/amd/vulkan/radv_meta.h b/src/amd/vulkan/radv_meta.h index ed461575e6c..ce2c25f5850 100644 --- a/src/amd/vulkan/radv_meta.h +++ b/src/amd/vulkan/radv_meta.h @@ -284,25 +284,6 @@ radv_is_dcc_decompress_pipeline(struct radv_cmd_buffer *cmd_buffer) meta_state->fast_clear_flush.dcc_decompress_pipeline; } -/** - * Return whether the bound pipeline is the hardware resolve path. - */ -static inline bool -radv_is_hw_resolve_pipeline(struct radv_cmd_buffer *cmd_buffer) -{ - struct radv_meta_state *meta_state = &cmd_buffer->device->meta_state; - struct radv_pipeline *pipeline = cmd_buffer->state.pipeline; - - if (!pipeline) - return false; - - for (uint32_t i = 0; i < NUM_META_FS_KEYS; ++i) { - if (radv_pipeline_to_handle(pipeline) == meta_state->resolve.pipeline[i]) - return true; - } - return false; -} - /* common nir builder helpers */ #include "nir/nir_builder.h" diff --git a/src/amd/vulkan/radv_meta_fast_clear.c b/src/amd/vulkan/radv_meta_fast_clear.c index e10da6bfde9..0a250071b9f 100644 --- a/src/amd/vulkan/radv_meta_fast_clear.c +++ b/src/amd/vulkan/radv_meta_fast_clear.c @@ -186,8 +186,8 @@ create_pass(struct radv_device *device) attachment.samples = 1; attachment.loadOp = VK_ATTACHMENT_LOAD_OP_LOAD; attachment.storeOp = VK_ATTACHMENT_STORE_OP_STORE; - attachment.initialLayout = VK_IMAGE_LAYOUT_TRANSFER_DST_OPTIMAL; - attachment.finalLayout = VK_IMAGE_LAYOUT_TRANSFER_DST_OPTIMAL; + attachment.initialLayout = VK_IMAGE_LAYOUT_COLOR_ATTACHMENT_OPTIMAL; + attachment.finalLayout = VK_IMAGE_LAYOUT_COLOR_ATTACHMENT_OPTIMAL; result = radv_CreateRenderPass2(device_h, &(VkRenderPassCreateInfo2) { @@ -204,7 +204,7 @@ create_pass(struct radv_device *device) { .sType = VK_STRUCTURE_TYPE_ATTACHMENT_REFERENCE_2, .attachment = 0, - .layout = VK_IMAGE_LAYOUT_TRANSFER_DST_OPTIMAL, + .layout = VK_IMAGE_LAYOUT_COLOR_ATTACHMENT_OPTIMAL, }, }, .pResolveAttachments = NULL, diff --git a/src/amd/vulkan/radv_meta_resolve.c b/src/amd/vulkan/radv_meta_resolve.c index 5ca95ff2c2f..c11c777e9b9 100644 --- a/src/amd/vulkan/radv_meta_resolve.c +++ b/src/amd/vulkan/radv_meta_resolve.c @@ -63,8 +63,8 @@ create_pass(struct radv_device *device, VkFormat vk_format, VkRenderPass *pass) attachments[i].loadOp = VK_ATTACHMENT_LOAD_OP_LOAD; attachments[i].storeOp = VK_ATTACHMENT_STORE_OP_STORE; } - attachments[0].initialLayout = VK_IMAGE_LAYOUT_GENERAL; - attachments[0].finalLayout = VK_IMAGE_LAYOUT_GENERAL; + attachments[0].initialLayout = VK_IMAGE_LAYOUT_COLOR_ATTACHMENT_OPTIMAL; + attachments[0].finalLayout = VK_IMAGE_LAYOUT_COLOR_ATTACHMENT_OPTIMAL; attachments[1].initialLayout = VK_IMAGE_LAYOUT_COLOR_ATTACHMENT_OPTIMAL; attachments[1].finalLayout = VK_IMAGE_LAYOUT_COLOR_ATTACHMENT_OPTIMAL; @@ -83,7 +83,7 @@ create_pass(struct radv_device *device, VkFormat vk_format, VkRenderPass *pass) { .sType = VK_STRUCTURE_TYPE_ATTACHMENT_REFERENCE_2, .attachment = 0, - .layout = VK_IMAGE_LAYOUT_GENERAL, + .layout = VK_IMAGE_LAYOUT_COLOR_ATTACHMENT_OPTIMAL, }, { .sType = VK_STRUCTURE_TYPE_ATTACHMENT_REFERENCE_2,