pan/bi: Track scalarness of 16-bit ALU

Needed for optimal swizzle lowering.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10627>
This commit is contained in:
Alyssa Rosenzweig 2021-04-13 20:21:03 -04:00 committed by Marge Bot
parent 59afff8708
commit 578f5d0000
2 changed files with 7 additions and 0 deletions

View file

@ -1532,6 +1532,10 @@ bi_emit_alu(bi_builder *b, nir_alu_instr *instr)
unsigned comps = nir_dest_num_components(instr->dest.dest);
unsigned src_sz = srcs > 0 ? nir_src_bit_size(instr->src[0].src) : 0;
/* Indicate scalarness */
if ((sz == 1 || sz == 16) && comps == 1)
dst.swizzle = BI_SWIZZLE_H00;
if (!instr->dest.dest.is_ssa) {
for (unsigned i = 0; i < comps; ++i)
assert(instr->dest.write_mask);

View file

@ -83,6 +83,9 @@ typedef struct {
bool abs : 1;
bool neg : 1;
/* For a source, the swizzle. For a destination, acts a bit like a
* write mask. Identity for the full 32-bit, H00 for only caring about
* the lower half, other values unused. */
enum bi_swizzle swizzle : 4;
uint32_t offset : 2;
bool reg : 1;