diff --git a/src/gallium/drivers/iris/iris_state.c b/src/gallium/drivers/iris/iris_state.c
index df14d0495a3..c95ded598c1 100644
--- a/src/gallium/drivers/iris/iris_state.c
+++ b/src/gallium/drivers/iris/iris_state.c
@@ -5087,6 +5087,9 @@ iris_store_tes_state(const struct intel_device_info *devinfo,
iris_pack_command(GENX(3DSTATE_TE), te_state, te) {
te.Partitioning = tes_data->partitioning;
+#if GFX_VER >= 20
+ te.NumberOfRegionsPerPatch = 2;
+#endif
te.OutputTopology = tes_data->output_topology;
te.TEDomain = tes_data->domain;
te.TEEnable = true;
diff --git a/src/intel/genxml/gen20.xml b/src/intel/genxml/gen20.xml
index 922e888dec9..895dcf5319d 100644
--- a/src/intel/genxml/gen20.xml
+++ b/src/intel/genxml/gen20.xml
@@ -746,6 +746,7 @@
+
diff --git a/src/intel/vulkan/genX_pipeline.c b/src/intel/vulkan/genX_pipeline.c
index 4625ecd9541..414fc3b6222 100644
--- a/src/intel/vulkan/genX_pipeline.c
+++ b/src/intel/vulkan/genX_pipeline.c
@@ -1451,6 +1451,10 @@ emit_3dstate_te(struct anv_graphics_pipeline *pipeline)
/* 1K_TRIANGLES */
te.LocalBOPAccumulatorThreshold = 1;
#endif
+
+#if GFX_VER >= 20
+ te.NumberOfRegionsPerPatch = 2;
+#endif
}
}
}