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freedreno/ir3: fix FSLT/etc handling to return 0/-1 instead of 0/1.0

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Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Signed-off-by: Rob Clark <robclark@freedesktop.org>
This commit is contained in:
Ilia Mirkin 2014-09-09 22:52:52 -04:00 • committed by Rob Clark
parent 80058c0f08
commit 572ffca050
1 changed files with 8 additions and 4 deletions
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12
src/gallium/drivers/freedreno/ir3/ir3_compiler.c
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@ -1411,21 +1411,25 @@ trans_cmp(const struct instr_translater *t,
switch (t->tgsi_opc) {
case TGSI_OPCODE_SEQ:
case TGSI_OPCODE_FSEQ:
case TGSI_OPCODE_SGE:
case TGSI_OPCODE_FSGE:
case TGSI_OPCODE_SLE:
case TGSI_OPCODE_SNE:
case TGSI_OPCODE_FSNE:
case TGSI_OPCODE_SGT:
case TGSI_OPCODE_SLT:
case TGSI_OPCODE_FSLT:
/* cov.u16f16 dst, tmp0 */
instr = instr_create(ctx, 1, 0);
instr->cat1.src_type = get_utype(ctx);
instr->cat1.dst_type = get_ftype(ctx);
vectorize(ctx, instr, dst, 1, tmp_src, 0);
break;
case TGSI_OPCODE_FSEQ:
case TGSI_OPCODE_FSGE:
case TGSI_OPCODE_FSNE:
case TGSI_OPCODE_FSLT:
/* absneg.s dst, (neg)tmp0 */
instr = instr_create(ctx, 2, OPC_ABSNEG_S);
vectorize(ctx, instr, dst, 1, tmp_src, IR3_REG_NEGATE);
break;
case TGSI_OPCODE_CMP:
a1 = &inst->Src[1].Register;
a2 = &inst->Src[2].Register;