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Merge branch 'panvk-interleaved-64k' into 'main'

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Draft: panvk: 64k interleaved tiling

See merge request mesa/mesa!38986
This commit is contained in:
Caterina Shablia 2025-12-20 01:48:52 +01:00
commit 56e50f7d70
8 changed files with 61 additions and 7 deletions
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7
include/drm-uapi/drm_fourcc.h
View file

@ -1422,6 +1422,13 @@ drm_fourcc_canonicalize_nvidia_format_mod(__u64 modifier)
#define DRM_FORMAT_MOD_ARM_16X16_BLOCK_U_INTERLEAVED \
DRM_FORMAT_MOD_ARM_CODE(DRM_FORMAT_MOD_ARM_TYPE_MISC, 1ULL)
/*
* Arm 64k interleaved
*/
#define DRM_FORMAT_MOD_ARM_64K_INTERLEAVED \
DRM_FORMAT_MOD_ARM_CODE(DRM_FORMAT_MOD_ARM_TYPE_MISC, 2ULL)
/*
* Allwinner tiled modifier
*

2
src/panfrost/genxml/v10.xml
View file

@ -366,6 +366,7 @@
<!--- 16x16 block u-interleaved -->
<value name="Tiled U-Interleaved" value="1"/>
<value name="Linear" value="2"/>
<value name="Interleaved 64k" value="8"/>
<value name="AFBC" value="12"/>
<value name="AFBC Tiled" value="13"/>
</enum>
@ -1156,6 +1157,7 @@
<enum name="Clump Ordering">
<value name="Tiled U-Interleaved" value="1"/>
<value name="Linear" value="2"/>
<value name="Interleaved 64k" value="8"/>
</enum>
<enum name="Clump Format">

2
src/panfrost/genxml/v12.xml
View file

@ -367,6 +367,7 @@
<!--- 16x16 block u-interleaved -->
<value name="Tiled U-Interleaved" value="1"/>
<value name="Linear" value="2"/>
<value name="Interleaved 64k" value="8"/>
<value name="AFBC" value="12"/>
<value name="AFBC Tiled" value="13"/>
</enum>
@ -1419,6 +1420,7 @@
<enum name="Clump Ordering">
<value name="Tiled U-Interleaved" value="1"/>
<value name="Linear" value="2"/>
<value name="Interleaved 64k" value="8"/>
</enum>
<enum name="Clump Format">

2
src/panfrost/genxml/v13.xml
View file

@ -367,6 +367,7 @@
<!--- 16x16 block u-interleaved -->
<value name="Tiled U-Interleaved" value="1"/>
<value name="Linear" value="2"/>
<value name="Interleaved 64k" value="8"/>
<value name="AFBC" value="12"/>
<value name="AFBC Tiled" value="13"/>
</enum>
@ -1721,6 +1722,7 @@
<enum name="Clump Ordering">
<value name="Tiled U-Interleaved" value="1"/>
<value name="Linear" value="2"/>
<value name="Interleaved 64k" value="8"/>
</enum>
<enum name="Clump Format">

29
src/panfrost/lib/pan_desc.c
View file

@ -827,6 +827,35 @@ GENX(pan_emit_afrc_color_attachment)(const struct pan_fb_info *fb,
cfg.writeback_buffer.surface_stride = surf_stride;
}
}
void
GENX(pan_emit_interleaved_64k_color_attachment)(const struct pan_fb_info *fb,
unsigned rt_idx,
unsigned layer_or_z_slice,
unsigned cbuf_offset, void *payload)
{
const struct pan_fb_color_attachment *rt = &fb->rts[rt_idx];
const struct pan_image_view *iview = rt->view;
uint64_t base, row_stride, surf_stride;
get_tiled_or_linear_att_mem_props(pan_image_view_get_color_plane(iview),
iview->first_level, layer_or_z_slice,
&base, &row_stride, &surf_stride);
/* TODO: YUV RT. */
assert(!pan_format_is_yuv(iview->format));
pan_cast_and_pack(payload, RGB_RENDER_TARGET, cfg) {
rt_common_cfg(rt, cbuf_offset, fb->tile_size, cfg);
cfg.write_enable = true;
cfg.writeback_block_format = MALI_BLOCK_FORMAT_INTERLEAVED_64K;
get_rt_formats(iview->format, &cfg.writeback_format, &cfg.internal_format,
&cfg.swizzle);
cfg.srgb = util_format_is_srgb(iview->format);
cfg.writeback_buffer.base = base;
cfg.writeback_buffer.row_stride = row_stride;
cfg.writeback_buffer.surface_stride = surf_stride;
}
}
#endif
#endif

6
src/panfrost/lib/pan_desc.h
View file

@ -315,6 +315,12 @@ void GENX(pan_emit_afrc_color_attachment)(const struct pan_fb_info *fb,
unsigned rt_idx,
unsigned layer_or_z_slice,
unsigned cbuf_offset, void *payload);
void
GENX(pan_emit_interleaved_64k_color_attachment)(const struct pan_fb_info *fb,
unsigned rt_idx,
unsigned layer_or_z_slice,
unsigned cbuf_offset, void *payload);
#endif
unsigned GENX(pan_emit_fbd)(const struct pan_fb_info *fb, unsigned layer_idx,

1
src/panfrost/lib/pan_mod.c
View file

@ -726,6 +726,7 @@ static const struct pan_mod_handler pan_mod_handlers[] = {
PAN_MOD_DEF(linear),
#if PAN_ARCH >= 10
PAN_MOD_DEF(afrc),
// PAN_MOD_DEF(interleaved_64k),
#endif
};

13
src/panfrost/lib/pan_texture.c
View file

@ -410,7 +410,8 @@ emit_generic_plane(const struct pan_image_view *iview, int plane_idx,
/* 3-planar formats must use Chroma 2p planes for the U V planes. */
assert(plane_idx == 0 || desc->layout != UTIL_FORMAT_LAYOUT_PLANAR3);
assert(props->modifier == DRM_FORMAT_MOD_LINEAR ||
props->modifier == DRM_FORMAT_MOD_ARM_16X16_BLOCK_U_INTERLEAVED);
props->modifier == DRM_FORMAT_MOD_ARM_16X16_BLOCK_U_INTERLEAVED ||
props->modifier == DRM_FORMAT_MOD_ARM_64K_INTERLEAVED);
get_linear_or_u_tiled_plane_props(iview, plane_idx, mip_level,
layer_or_z_slice, &plane_addr, &row_stride,
@ -418,9 +419,13 @@ emit_generic_plane(const struct pan_image_view *iview, int plane_idx,
pan_cast_and_pack(payload, GENERIC_PLANE, cfg) {
cfg.clump_ordering =
props->modifier == DRM_FORMAT_MOD_ARM_16X16_BLOCK_U_INTERLEAVED
? MALI_CLUMP_ORDERING_TILED_U_INTERLEAVED
: MALI_CLUMP_ORDERING_LINEAR;
props->modifier == DRM_FORMAT_MOD_ARM_16X16_BLOCK_U_INTERLEAVED ?
MALI_CLUMP_ORDERING_TILED_U_INTERLEAVED :
#if PAN_ARCH >= 10
props->modifier == DRM_FORMAT_MOD_ARM_64K_INTERLEAVED ?
MALI_CLUMP_ORDERING_INTERLEAVED_64K :
#endif
MALI_CLUMP_ORDERING_LINEAR;
cfg.clump_format = pan_clump_format(iview->format);
PLANE_SET_SIZE(cfg, plane_size);
cfg.pointer = plane_addr;