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intel/compiler: Memory fence commit must always be enabled for gen10+

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Commit bit in the message descriptor (Bit 13) must be always set
to true in CNL+ for memory fence messages. It also fixes a piglit
GPU hang on cnl+ in simulation environment.
Piglit test: arb_shader_image_load_store-shader-mem-barrier
See HSD ES # 1404612949

Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
Cc: mesa-stable@lists.freedesktop.org
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
This commit is contained in:
Anuj Phogat 2018-02-06 17:09:09 -08:00 • committed by Francisco Jerez
parent 4b4838b1ae
commit 56dc9f9f49
1 changed files with 3 additions and 1 deletions
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4
src/intel/compiler/brw_eu_emit.c
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@ -3287,7 +3287,9 @@ brw_memory_fence(struct brw_codegen *p,
struct brw_reg dst)
{
const struct gen_device_info *devinfo = p->devinfo;
const bool commit_enable = devinfo->gen == 7 && !devinfo->is_haswell;
const bool commit_enable =
devinfo->gen >= 10 || /* HSD ES # 1404612949 */
(devinfo->gen == 7 && !devinfo->is_haswell);
struct brw_inst *insn;
brw_push_insn_state(p);