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radv: enable more float_controls features
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com> Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5773>
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1 changed files with 10 additions and 11 deletions
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@ -1557,30 +1557,29 @@ radv_get_physical_device_properties_1_2(struct radv_physical_device *pdevice,
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p->roundingModeIndependence = VK_SHADER_FLOAT_CONTROLS_INDEPENDENCE_ALL_KHR;
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p->roundingModeIndependence = VK_SHADER_FLOAT_CONTROLS_INDEPENDENCE_ALL_KHR;
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}
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}
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/* Do not allow both preserving and flushing denorms because different
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/* With LLVM, do not allow both preserving and flushing denorms because
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* shaders in the same pipeline can have different settings and this
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* different shaders in the same pipeline can have different settings and
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* won't work for merged shaders. To make it work, this requires LLVM
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* this won't work for merged shaders. To make it work, this requires LLVM
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* support for changing the register. The same logic applies for the
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* support for changing the register. The same logic applies for the
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* rounding modes because they are configured with the same config
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* rounding modes because they are configured with the same config
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* register. TODO: we can enable a lot of these for ACO when it
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* register.
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* supports all stages.
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*/
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*/
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p->shaderDenormFlushToZeroFloat32 = true;
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p->shaderDenormFlushToZeroFloat32 = true;
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p->shaderDenormPreserveFloat32 = false;
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p->shaderDenormPreserveFloat32 = !pdevice->use_llvm;
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p->shaderRoundingModeRTEFloat32 = true;
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p->shaderRoundingModeRTEFloat32 = true;
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p->shaderRoundingModeRTZFloat32 = false;
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p->shaderRoundingModeRTZFloat32 = !pdevice->use_llvm;
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p->shaderSignedZeroInfNanPreserveFloat32 = true;
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p->shaderSignedZeroInfNanPreserveFloat32 = true;
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p->shaderDenormFlushToZeroFloat16 = false;
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p->shaderDenormFlushToZeroFloat16 = pdevice->rad_info.has_packed_math_16bit && !pdevice->use_llvm;
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p->shaderDenormPreserveFloat16 = pdevice->rad_info.has_packed_math_16bit;
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p->shaderDenormPreserveFloat16 = pdevice->rad_info.has_packed_math_16bit;
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p->shaderRoundingModeRTEFloat16 = pdevice->rad_info.has_packed_math_16bit;
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p->shaderRoundingModeRTEFloat16 = pdevice->rad_info.has_packed_math_16bit;
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p->shaderRoundingModeRTZFloat16 = false;
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p->shaderRoundingModeRTZFloat16 = pdevice->rad_info.has_packed_math_16bit && !pdevice->use_llvm;
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p->shaderSignedZeroInfNanPreserveFloat16 = pdevice->rad_info.has_packed_math_16bit;
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p->shaderSignedZeroInfNanPreserveFloat16 = pdevice->rad_info.has_packed_math_16bit;
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p->shaderDenormFlushToZeroFloat64 = false;
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p->shaderDenormFlushToZeroFloat64 = pdevice->rad_info.chip_class >= GFX8 && !pdevice->use_llvm;
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p->shaderDenormPreserveFloat64 = pdevice->rad_info.chip_class >= GFX8;
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p->shaderDenormPreserveFloat64 = pdevice->rad_info.chip_class >= GFX8;
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p->shaderRoundingModeRTEFloat64 = pdevice->rad_info.chip_class >= GFX8;
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p->shaderRoundingModeRTEFloat64 = pdevice->rad_info.chip_class >= GFX8;
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p->shaderRoundingModeRTZFloat64 = false;
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p->shaderRoundingModeRTZFloat64 = pdevice->rad_info.chip_class >= GFX8 && !pdevice->use_llvm;
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p->shaderSignedZeroInfNanPreserveFloat64 = pdevice->rad_info.chip_class >= GFX8;
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p->shaderSignedZeroInfNanPreserveFloat64 = pdevice->rad_info.chip_class >= GFX8;
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p->maxUpdateAfterBindDescriptorsInAllPools = UINT32_MAX / 64;
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p->maxUpdateAfterBindDescriptorsInAllPools = UINT32_MAX / 64;
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