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r600: fix the indirect draw 8-bits path

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This change fixes the indirect draw 8-bits path which does
a conversion to 16-bits. This change is implemented to process
the parameters the same way as the other indirect draw paths.

This change was tested on palm and cayman. Here are the tests fixed:
deqp-gles31/functional/draw_indirect/draw_elements_indirect/indices/index_byte: fail pass
deqp-gles31/functional/draw_indirect/random/35: fail pass
deqp-gles31/functional/draw_indirect/random/45: fail pass
khr-gl40/draw_indirect/basic-indicesdatatype-unsigned_byte: fail pass
khr-gl41/draw_indirect/basic-indicesdatatype-unsigned_byte: fail pass
khr-gl42/draw_indirect/basic-indicesdatatype-unsigned_byte: fail pass
khr-gl43/draw_indirect/basic-indicesdatatype-unsigned_byte: fail pass
khr-gl44/draw_indirect/basic-indicesdatatype-unsigned_byte: fail pass
khr-gl45/draw_indirect/basic-indicesdatatype-unsigned_byte: fail pass

Fixes: d80701df8a ("r600g: Implement GL_ARB_draw_indirect for EG/CM")
Signed-off-by: Patrick Lerda <patrick9876@free.fr>
Acked-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32802>
(cherry picked from commit 9aea08e1db)
This commit is contained in:
Patrick Lerda 2024-12-27 12:42:02 +01:00 • committed by Eric Engestrom
parent 3f7abae2fc
commit 56d066e062
3 changed files with 14 additions and 32 deletions
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2
.pick_status.json
View file

@ -194,7 +194,7 @@
"description": "r600: fix the indirect draw 8-bits path",
"nominated": true,
"nomination_type": 2,
"resolution": 0,
"resolution": 1,
"main_sha": null,
"because_sha": "d80701df8af4a5d74c4f4eb09a4b3cef6970104b",
"notes": null

7
src/gallium/drivers/r600/ci/r600-turks-fails.txt
View file

@ -439,13 +439,6 @@ dEQP-GLES31.functional.draw_buffers_indexed.random.max_implementation_draw_buffe
dEQP-GLES31.functional.draw_buffers_indexed.random.max_implementation_draw_buffers.8,Fail
dEQP-GLES31.functional.draw_buffers_indexed.random.max_implementation_draw_buffers.9,Fail
# One triangle missing
dEQP-GLES31.functional.draw_indirect.draw_elements_indirect.indices.index_byte,Fail
# Line is entirely missing
dEQP-GLES31.functional.draw_indirect.random.35,Fail
dEQP-GLES31.functional.draw_indirect.random.45,Fail
dEQP-GLES31.functional.image_load_store.2d.format_reinterpret.r32f_rgba8_snorm,Fail
dEQP-GLES31.functional.image_load_store.2d.format_reinterpret.rgba8_rgba8_snorm,Fail
dEQP-GLES31.functional.image_load_store.2d_array.format_reinterpret.r32f_rgba8_snorm,Fail

37
src/gallium/drivers/r600/r600_state_common.c
View file

@ -2211,30 +2211,16 @@ static void r600_draw_vbo(struct pipe_context *ctx, const struct pipe_draw_info
struct pipe_resource *out_buffer = NULL;
unsigned out_offset;
void *ptr;
unsigned start, count;
const unsigned out_size = sizeof(uint16_t);
const unsigned start = 0;
const unsigned count = likely(!indirect) ?
draws[0].count :
indexbuf->width0 - index_offset;
const unsigned out_width = count * out_size;
if (likely(!indirect)) {
start = 0;
count = draws[0].count;
}
else {
/* Have to get start/count from indirect buffer, slow path ahead... */
struct r600_resource *indirect_resource = (struct r600_resource *)indirect->buffer;
unsigned *data = r600_buffer_map_sync_with_rings(&rctx->b, indirect_resource,
PIPE_MAP_READ);
if (data) {
data += indirect->offset / sizeof(unsigned);
start = data[2] * index_size;
count = data[0];
}
else {
start = 0;
count = 0;
}
}
u_upload_alloc(ctx->stream_uploader, start, count * 2,
u_upload_alloc(ctx->stream_uploader, start, out_width,
256, &out_offset, &out_buffer, &ptr);
if (unlikely(!ptr))
return;
@ -2243,7 +2229,7 @@ static void r600_draw_vbo(struct pipe_context *ctx, const struct pipe_draw_info
indexbuf = out_buffer;
index_offset = out_offset;
index_size = 2;
index_size = out_size;
has_user_indices = false;
}
@ -2432,7 +2418,10 @@ static void r600_draw_vbo(struct pipe_context *ctx, const struct pipe_draw_info
RADEON_PRIO_INDEX_BUFFER));
}
else {
uint32_t max_size = (indexbuf->width0 - index_offset) / index_size;
const uint32_t max_size =
likely(indexbuf == info->index.resource) ?
(indexbuf->width0 - index_offset) / index_size :
info->index.resource->width0 - draws[0].start;
radeon_emit(cs, PKT3(EG_PKT3_INDEX_BASE, 1, 0));
radeon_emit(cs, va);