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Revert "radeonsi: don't wait for idle at the end of gfx IBs"

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This reverts commit 266fec1307.

The kernel doesn't wait for idle as part of implicit sync.

Fixes: 266fec1307
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/2950

Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5095>
This commit is contained in:
Marek Olšák 2020-05-19 18:31:55 -04:00
parent 3f1f23239a
commit 56af131f33
1 changed files with 0 additions and 13 deletions
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13
src/gallium/drivers/radeonsi/si_gfx_cs.c
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@ -78,19 +78,6 @@ void si_flush_gfx_cs(struct si_context *ctx, unsigned flags, struct pipe_fence_h
if (ctx->gfx_flush_in_progress)
return;
/* The amdgpu kernel driver always synchronizes execution for shared DMABUFs
* between processes, so we don't have to wait at the end of IBs to make sure
* everything is idle.
*
* The amdgpu winsys synchronizes execution for buffers shared by different
* contexts within the same process.
*
* Interop with AMDVLK, RADV, or OpenCL within the same process requires
* explicit fences or glFinish.
*/
if (ctx->screen->info.is_amdgpu)
flags |= RADEON_FLUSH_START_NEXT_GFX_IB_NOW;
if (!ctx->screen->info.kernel_flushes_tc_l2_after_ib) {
wait_flags |= wait_ps_cs | SI_CONTEXT_INV_L2;
} else if (ctx->chip_class == GFX6) {