mirror of
https://gitlab.freedesktop.org/mesa/mesa.git
synced 2026-05-08 13:28:06 +02:00
nvk: Add an nvk_cmd_buffer_push helper
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24326>
This commit is contained in:
parent
87686a2220
commit
567148c172
7 changed files with 35 additions and 28 deletions
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@ -21,7 +21,7 @@ nvk_CmdBlitImage2(VkCommandBuffer commandBuffer,
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VK_FROM_HANDLE(nvk_image, src, pBlitImageInfo->srcImage);
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VK_FROM_HANDLE(nvk_image, dst, pBlitImageInfo->dstImage);
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struct nv_push *p = P_SPACE(cmd->push, 16);
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struct nv_push *p = nvk_cmd_buffer_push(cmd, 16);
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assert(nvk_get_format(src->vk.format)->supports_2d_blit);
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assert(nvk_get_format(dst->vk.format)->supports_2d_blit);
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@ -69,7 +69,7 @@ nvk_CmdBlitImage2(VkCommandBuffer commandBuffer,
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for (unsigned r = 0; r < pBlitImageInfo->regionCount; r++) {
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const VkImageBlit2 *region = &pBlitImageInfo->pRegions[r];
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p = P_SPACE(cmd->push, 30 + region->srcSubresource.layerCount * 10);
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p = nvk_cmd_buffer_push(cmd, 30 + region->srcSubresource.layerCount * 10);
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unsigned x_i = region->dstOffsets[0].x < region->dstOffsets[1].x ? 0 : 1;
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unsigned y_i = region->dstOffsets[0].y < region->dstOffsets[1].y ? 0 : 1;
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@ -202,7 +202,7 @@ nvk_BeginCommandBuffer(VkCommandBuffer commandBuffer,
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nvk_reset_cmd_buffer(&cmd->vk, 0);
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/* Start with a nop so we have at least something to submit */
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struct nv_push *p = P_SPACE(cmd->push, 2);
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struct nv_push *p = nvk_cmd_buffer_push(cmd, 2);
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P_MTHD(p, NV90B5, NOP);
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P_NV90B5_NOP(p, 0);
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@ -116,6 +116,13 @@ nvk_cmd_buffer_device(struct nvk_cmd_buffer *cmd)
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return (struct nvk_device *)cmd->vk.base.device;
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}
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static inline struct nv_push *
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nvk_cmd_buffer_push(struct nvk_cmd_buffer *cmd, uint32_t dw_count)
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{
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return P_SPACE(cmd->push, dw_count);
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}
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void nvk_cmd_buffer_begin_graphics(struct nvk_cmd_buffer *cmd,
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const VkCommandBufferBeginInfo *pBeginInfo);
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void nvk_cmd_buffer_begin_compute(struct nvk_cmd_buffer *cmd,
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@ -58,7 +58,7 @@ emit_clear_rects(struct nvk_cmd_buffer *cmd,
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{
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struct nvk_rendering_state *render = &cmd->state.gfx.render;
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struct nv_push *p = P_SPACE(cmd->push, rect_count * 6);
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struct nv_push *p = nvk_cmd_buffer_push(cmd, rect_count * 6);
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for (uint32_t r = 0; r < rect_count; r++) {
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P_MTHD(p, NV9097, SET_CLEAR_RECT_HORIZONTAL);
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@ -115,7 +115,7 @@ nvk_CmdClearAttachments(VkCommandBuffer commandBuffer,
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const VkClearRect *pRects)
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{
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VK_FROM_HANDLE(nvk_cmd_buffer, cmd, commandBuffer);
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struct nv_push *p = P_SPACE(cmd->push, 2 + attachmentCount * 4);
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struct nv_push *p = nvk_cmd_buffer_push(cmd, 2 + attachmentCount * 4);
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P_IMMD(p, NV9097, SET_CLEAR_SURFACE_CONTROL, {
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.respect_stencil_mask = RESPECT_STENCIL_MASK_FALSE,
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@ -147,7 +147,7 @@ nvk_CmdClearAttachments(VkCommandBuffer commandBuffer,
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continue;
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VkClearColorValue color = pAttachments[i].clearValue.color;
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p = P_SPACE(cmd->push, 5);
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p = nvk_cmd_buffer_push(cmd, 5);
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P_MTHD(p, NV9097, SET_COLOR_CLEAR_VALUE(0));
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P_NV9097_SET_COLOR_CLEAR_VALUE(p, 0, color.uint32[0]);
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@ -144,7 +144,7 @@ nouveau_copy_rect(struct nvk_cmd_buffer *cmd, struct nouveau_copy *copy)
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{
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uint32_t src_bw, dst_bw;
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if (copy->remap.comp_size > 0) {
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struct nv_push *p = P_SPACE(cmd->push, 2);
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struct nv_push *p = nvk_cmd_buffer_push(cmd, 2);
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assert(copy->src.bpp % copy->remap.comp_size == 0);
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assert(copy->dst.bpp % copy->remap.comp_size == 0);
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@ -192,7 +192,7 @@ nouveau_copy_rect(struct nvk_cmd_buffer *cmd, struct nouveau_copy *copy)
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}
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for (unsigned z = 0; z < copy->extent_el.depth; z++) {
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struct nv_push *p = P_SPACE(cmd->push, 31);
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struct nv_push *p = nvk_cmd_buffer_push(cmd, 31);
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P_MTHD(p, NV90B5, OFFSET_IN_UPPER);
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P_NV90B5_OFFSET_IN_UPPER(p, src_addr >> 32);
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@ -299,7 +299,7 @@ nvk_CmdCopyBuffer2(VkCommandBuffer commandBuffer,
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uint64_t size = region->size;
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while (size) {
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struct nv_push *p = P_SPACE(cmd->push, 10);
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struct nv_push *p = nvk_cmd_buffer_push(cmd, 10);
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P_MTHD(p, NV90B5, OFFSET_IN_UPPER);
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P_NV90B5_OFFSET_IN_UPPER(p, src_addr >> 32);
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@ -547,7 +547,7 @@ nvk_CmdFillBuffer(VkCommandBuffer commandBuffer,
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uint32_t pitch = 1 << 19;
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uint32_t line = pitch / 4;
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struct nv_push *p = P_SPACE(cmd->push, 33);
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struct nv_push *p = nvk_cmd_buffer_push(cmd, 33);
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P_IMMD(p, NV902D, SET_OPERATION, V_SRCCOPY);
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@ -622,7 +622,7 @@ nvk_CmdUpdateBuffer(VkCommandBuffer commandBuffer,
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VkDeviceSize dst_addr = nvk_buffer_address(dst, 0);
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struct nv_push *p = P_SPACE(cmd->push, 26 + dataSize / 4);
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struct nv_push *p = nvk_cmd_buffer_push(cmd, 26 + dataSize / 4);
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P_IMMD(p, NV902D, SET_OPERATION, V_SRCCOPY);
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@ -101,7 +101,7 @@ nvk_CmdDispatch(VkCommandBuffer commandBuffer,
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return;
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}
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struct nv_push *p = P_SPACE(cmd->push, 6);
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struct nv_push *p = nvk_cmd_buffer_push(cmd, 6);
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P_MTHD(p, NVA0C0, INVALIDATE_SHADER_CACHES_NO_WFI);
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P_NVA0C0_INVALIDATE_SHADER_CACHES_NO_WFI(p, {
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@ -381,7 +381,7 @@ nvk_CmdBeginRendering(VkCommandBuffer commandBuffer,
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{
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VK_FROM_HANDLE(nvk_cmd_buffer, cmd, commandBuffer);
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struct nvk_rendering_state *render = &cmd->state.gfx.render;
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struct nv_push *p = P_SPACE(cmd->push, 23 + pRenderingInfo->colorAttachmentCount * 10);
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struct nv_push *p = nvk_cmd_buffer_push(cmd, 23 + pRenderingInfo->colorAttachmentCount * 10);
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memset(render, 0, sizeof(*render));
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@ -612,7 +612,7 @@ nvk_cmd_bind_graphics_pipeline(struct nvk_cmd_buffer *cmd,
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cmd->state.gfx.pipeline = pipeline;
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vk_cmd_set_dynamic_graphics_state(&cmd->vk, &pipeline->dynamic);
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struct nv_push *p = P_SPACE(cmd->push, pipeline->push_dw_count);
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struct nv_push *p = nvk_cmd_buffer_push(cmd, pipeline->push_dw_count);
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nv_push_raw(p, pipeline->push_data, pipeline->push_dw_count);
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}
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@ -624,7 +624,7 @@ nvk_flush_vi_state(struct nvk_cmd_buffer *cmd)
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const struct vk_dynamic_graphics_state *dyn =
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&cmd->vk.dynamic_graphics_state;
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struct nv_push *p = P_SPACE(cmd->push, 256);
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struct nv_push *p = nvk_cmd_buffer_push(cmd, 256);
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if (BITSET_TEST(dyn->dirty, MESA_VK_DYNAMIC_VI)) {
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u_foreach_bit(a, dyn->vi->attributes_valid) {
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@ -668,7 +668,7 @@ nvk_flush_ia_state(struct nvk_cmd_buffer *cmd)
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/** Nothing to do for MESA_VK_DYNAMIC_IA_PRIMITIVE_TOPOLOGY */
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if (BITSET_TEST(dyn->dirty, MESA_VK_DYNAMIC_IA_PRIMITIVE_RESTART_ENABLE)) {
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struct nv_push *p = P_SPACE(cmd->push, 2);
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struct nv_push *p = nvk_cmd_buffer_push(cmd, 2);
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P_IMMD(p, NV9097, SET_DA_PRIMITIVE_RESTART,
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dyn->ia.primitive_restart_enable);
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}
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@ -681,7 +681,7 @@ nvk_flush_ts_state(struct nvk_cmd_buffer *cmd)
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&cmd->vk.dynamic_graphics_state;
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if (BITSET_TEST(dyn->dirty, MESA_VK_DYNAMIC_TS_PATCH_CONTROL_POINTS)) {
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struct nv_push *p = P_SPACE(cmd->push, 2);
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struct nv_push *p = nvk_cmd_buffer_push(cmd, 2);
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P_IMMD(p, NV9097, SET_PATCH, dyn->ts.patch_control_points);
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}
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}
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@ -693,7 +693,7 @@ nvk_flush_vp_state(struct nvk_cmd_buffer *cmd)
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&cmd->vk.dynamic_graphics_state;
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struct nv_push *p =
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P_SPACE(cmd->push, 14 * dyn->vp.viewport_count + 4 * NVK_MAX_VIEWPORTS);
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nvk_cmd_buffer_push(cmd, 14 * dyn->vp.viewport_count + 4 * NVK_MAX_VIEWPORTS);
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/* Nothing to do for MESA_VK_DYNAMIC_VP_VIEWPORT_COUNT */
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@ -801,7 +801,7 @@ vk_to_nv9097_front_face(VkFrontFace vk_face)
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static void
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nvk_flush_rs_state(struct nvk_cmd_buffer *cmd)
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{
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struct nv_push *p = P_SPACE(cmd->push, 23);
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struct nv_push *p = nvk_cmd_buffer_push(cmd, 23);
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const struct vk_dynamic_graphics_state *dyn =
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&cmd->vk.dynamic_graphics_state;
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@ -895,7 +895,7 @@ vk_to_nv9097_stencil_op(VkStencilOp vk_op)
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static void
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nvk_flush_ds_state(struct nvk_cmd_buffer *cmd)
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{
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struct nv_push *p = P_SPACE(cmd->push, 35);
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struct nv_push *p = nvk_cmd_buffer_push(cmd, 35);
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const struct vk_dynamic_graphics_state *dyn =
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&cmd->vk.dynamic_graphics_state;
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@ -986,7 +986,7 @@ vk_to_nv9097_logic_op(VkLogicOp vk_op)
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static void
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nvk_flush_cb_state(struct nvk_cmd_buffer *cmd)
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{
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struct nv_push *p = P_SPACE(cmd->push, 7);
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struct nv_push *p = nvk_cmd_buffer_push(cmd, 7);
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const struct vk_dynamic_graphics_state *dyn =
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&cmd->vk.dynamic_graphics_state;
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@ -1046,7 +1046,7 @@ nvk_flush_descriptors(struct nvk_cmd_buffer *cmd)
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return;
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}
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struct nv_push *p = P_SPACE(cmd->push, 26);
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struct nv_push *p = nvk_cmd_buffer_push(cmd, 26);
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P_MTHD(p, NV9097, SET_CONSTANT_BUFFER_SELECTOR_A);
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P_NV9097_SET_CONSTANT_BUFFER_SELECTOR_A(p, sizeof(desc->root));
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@ -1116,7 +1116,7 @@ nvk_CmdBindIndexBuffer(VkCommandBuffer commandBuffer,
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VK_FROM_HANDLE(nvk_cmd_buffer, cmd, commandBuffer);
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VK_FROM_HANDLE(nvk_buffer, buffer, _buffer);
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struct nv_push *p = P_SPACE(cmd->push, 10);
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struct nv_push *p = nvk_cmd_buffer_push(cmd, 10);
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uint64_t addr, range;
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if (buffer) {
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@ -1151,7 +1151,7 @@ void
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nvk_cmd_bind_vertex_buffer(struct nvk_cmd_buffer *cmd, uint32_t vb_idx,
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struct nvk_addr_range addr_range)
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{
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struct nv_push *p = P_SPACE(cmd->push, 6);
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struct nv_push *p = nvk_cmd_buffer_push(cmd, 6);
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P_MTHD(p, NV9097, SET_VERTEX_STREAM_A_LOCATION_A(vb_idx));
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P_NV9097_SET_VERTEX_STREAM_A_LOCATION_A(p, vb_idx, addr_range.addr >> 32);
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@ -1295,7 +1295,7 @@ nvk_CmdDraw(VkCommandBuffer commandBuffer,
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.split_mode = SPLIT_MODE_NORMAL_BEGIN_NORMAL_END,
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});
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struct nv_push *p = P_SPACE(cmd->push, 6);
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struct nv_push *p = nvk_cmd_buffer_push(cmd, 6);
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P_1INC(p, NV9097, CALL_MME_MACRO(NVK_MME_DRAW));
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P_INLINE_DATA(p, begin);
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P_INLINE_DATA(p, vertexCount);
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@ -1369,7 +1369,7 @@ nvk_CmdDrawIndexed(VkCommandBuffer commandBuffer,
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.split_mode = SPLIT_MODE_NORMAL_BEGIN_NORMAL_END,
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});
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struct nv_push *p = P_SPACE(cmd->push, 7);
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struct nv_push *p = nvk_cmd_buffer_push(cmd, 7);
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P_1INC(p, NV9097, CALL_MME_MACRO(NVK_MME_DRAW_INDEXED));
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P_INLINE_DATA(p, begin);
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P_INLINE_DATA(p, indexCount);
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@ -1438,7 +1438,7 @@ nvk_CmdDrawIndirect(VkCommandBuffer commandBuffer,
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.split_mode = SPLIT_MODE_NORMAL_BEGIN_NORMAL_END,
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});
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struct nv_push *p = P_SPACE(cmd->push, 8);
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struct nv_push *p = nvk_cmd_buffer_push(cmd, 8);
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P_IMMD(p, NVC597, SET_MME_DATA_FIFO_CONFIG, FIFO_SIZE_SIZE_4KB);
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P_1INC(p, NV9097, CALL_MME_MACRO(NVK_MME_DRAW_INDIRECT));
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P_INLINE_DATA(p, begin);
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@ -1492,7 +1492,7 @@ nvk_CmdDrawIndexedIndirect(VkCommandBuffer commandBuffer,
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.split_mode = SPLIT_MODE_NORMAL_BEGIN_NORMAL_END,
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});
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struct nv_push *p = P_SPACE(cmd->push, 8);
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struct nv_push *p = nvk_cmd_buffer_push(cmd, 8);
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P_IMMD(p, NVC597, SET_MME_DATA_FIFO_CONFIG, FIFO_SIZE_SIZE_4KB);
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P_1INC(p, NV9097, CALL_MME_MACRO(NVK_MME_DRAW_INDEXED_INDIRECT));
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P_INLINE_DATA(p, begin);
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