mirror of
https://gitlab.freedesktop.org/mesa/mesa.git
synced 2026-05-06 11:38:05 +02:00
Export _mesa_print_alu_instruction() to allow drivers to roll their
own debug code for programs with driver-private opcodes. Remove redundant loop in _mesa_num_inst_src_regs().
This commit is contained in:
parent
cb54c056a6
commit
5658810660
2 changed files with 43 additions and 41 deletions
|
|
@ -1450,19 +1450,8 @@ static const struct instruction_info InstInfo[MAX_OPCODE] = {
|
|||
GLuint
|
||||
_mesa_num_inst_src_regs(enum prog_opcode opcode)
|
||||
{
|
||||
GLuint i;
|
||||
#ifdef DEBUG
|
||||
for (i = 0; i < MAX_OPCODE; i++) {
|
||||
ASSERT(i == InstInfo[i].Opcode);
|
||||
}
|
||||
#endif
|
||||
for (i = 0; i < MAX_OPCODE; i++) {
|
||||
if (InstInfo[i].Opcode == opcode) {
|
||||
return InstInfo[i].NumSrcRegs;
|
||||
}
|
||||
}
|
||||
_mesa_problem(NULL, "invalid opcode in _mesa_num_inst_src_regs");
|
||||
return 0;
|
||||
ASSERT(opcode == InstInfo[opcode].Opcode);
|
||||
return InstInfo[opcode].NumSrcRegs;
|
||||
}
|
||||
|
||||
|
||||
|
|
@ -1601,6 +1590,38 @@ print_src_reg(const struct prog_src_register *srcReg)
|
|||
srcReg->NegateBase, GL_FALSE));
|
||||
}
|
||||
|
||||
void
|
||||
_mesa_print_alu_instruction(const struct prog_instruction *inst,
|
||||
const char *opcode_string,
|
||||
GLuint numRegs)
|
||||
{
|
||||
GLuint j;
|
||||
|
||||
_mesa_printf("%s", opcode_string);
|
||||
|
||||
/* frag prog only */
|
||||
if (inst->SaturateMode == SATURATE_ZERO_ONE)
|
||||
_mesa_printf("_SAT");
|
||||
|
||||
if (inst->DstReg.File != PROGRAM_UNDEFINED) {
|
||||
_mesa_printf(" %s[%d]%s",
|
||||
program_file_string((enum register_file) inst->DstReg.File),
|
||||
inst->DstReg.Index,
|
||||
writemask_string(inst->DstReg.WriteMask));
|
||||
}
|
||||
|
||||
if (numRegs > 0)
|
||||
_mesa_printf(", ");
|
||||
|
||||
for (j = 0; j < numRegs; j++) {
|
||||
print_src_reg(inst->SrcReg + j);
|
||||
if (j + 1 < numRegs)
|
||||
_mesa_printf(", ");
|
||||
}
|
||||
|
||||
_mesa_printf(";\n");
|
||||
}
|
||||
|
||||
|
||||
/**
|
||||
* Print a single vertex/fragment program instruction.
|
||||
|
|
@ -1662,34 +1683,10 @@ _mesa_print_instruction(const struct prog_instruction *inst)
|
|||
/* XXX may need for other special-case instructions */
|
||||
default:
|
||||
/* typical alu instruction */
|
||||
{
|
||||
const GLuint numRegs = _mesa_num_inst_src_regs(inst->Opcode);
|
||||
GLuint j;
|
||||
|
||||
_mesa_printf("%s", _mesa_opcode_string(inst->Opcode));
|
||||
|
||||
/* frag prog only */
|
||||
if (inst->SaturateMode == SATURATE_ZERO_ONE)
|
||||
_mesa_printf("_SAT");
|
||||
|
||||
if (inst->DstReg.File != PROGRAM_UNDEFINED) {
|
||||
_mesa_printf(" %s[%d]%s",
|
||||
program_file_string((enum register_file) inst->DstReg.File),
|
||||
inst->DstReg.Index,
|
||||
writemask_string(inst->DstReg.WriteMask));
|
||||
}
|
||||
|
||||
if (numRegs > 0)
|
||||
_mesa_printf(", ");
|
||||
|
||||
for (j = 0; j < numRegs; j++) {
|
||||
print_src_reg(inst->SrcReg + j);
|
||||
if (j + 1 < numRegs)
|
||||
_mesa_printf(", ");
|
||||
}
|
||||
|
||||
_mesa_printf(";\n");
|
||||
}
|
||||
_mesa_print_alu_instruction(inst,
|
||||
_mesa_opcode_string(inst->Opcode),
|
||||
_mesa_num_inst_src_regs(inst->Opcode));
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
|
|
|
|||
|
|
@ -264,6 +264,11 @@ _mesa_load_state_parameters(GLcontext *ctx,
|
|||
extern void
|
||||
_mesa_print_instruction(const struct prog_instruction *inst);
|
||||
|
||||
void
|
||||
_mesa_print_alu_instruction(const struct prog_instruction *inst,
|
||||
const char *opcode_string,
|
||||
GLuint numRegs);
|
||||
|
||||
extern void
|
||||
_mesa_print_program(const struct gl_program *prog);
|
||||
|
||||
|
|
|
|||
Loading…
Add table
Reference in a new issue