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intel/brw: Rely on existing helper for dispatch width of geometry stages

Browse source 
Helper already exists and is used in the functions, just save the value
so can be reused.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33175>
This commit is contained in:
Caio Oliveira 2025-01-22 13:06:33 -08:00 • committed by Marge Bot
parent fcb4412e9a
commit 563631cdd8
4 changed files with 8 additions and 11 deletions
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4
src/intel/compiler/brw_compile_gs.cpp
View file

@ -142,6 +142,7 @@ brw_compile_gs(const struct brw_compiler *compiler,
nir_shader *nir = params->base.nir;
const struct brw_gs_prog_key *key = params->key;
struct brw_gs_prog_data *prog_data = params->prog_data;
const unsigned dispatch_width = brw_geometry_stage_dispatch_width(compiler->devinfo);
struct brw_gs_compile c;
memset(&c, 0, sizeof(c));
@ -166,8 +167,7 @@ brw_compile_gs(const struct brw_compiler *compiler,
&c.input_vue_map, inputs_read,
nir->info.separate_shader, 1);
brw_nir_apply_key(nir, compiler, &key->base,
brw_geometry_stage_dispatch_width(compiler->devinfo));
brw_nir_apply_key(nir, compiler, &key->base, dispatch_width);
brw_nir_lower_vue_inputs(nir, &c.input_vue_map);
brw_nir_lower_vue_outputs(nir);
brw_postprocess_nir(nir, compiler, debug_enabled,

5
src/intel/compiler/brw_compile_tcs.cpp
View file

@ -192,6 +192,7 @@ brw_compile_tcs(const struct brw_compiler *compiler,
const struct brw_tcs_prog_key *key = params->key;
struct brw_tcs_prog_data *prog_data = params->prog_data;
struct brw_vue_prog_data *vue_prog_data = &prog_data->base;
const unsigned dispatch_width = brw_geometry_stage_dispatch_width(compiler->devinfo);
const bool debug_enabled = brw_should_print_shader(nir, DEBUG_TCS);
@ -209,8 +210,7 @@ brw_compile_tcs(const struct brw_compiler *compiler,
nir->info.outputs_written,
nir->info.patch_outputs_written);
brw_nir_apply_key(nir, compiler, &key->base,
brw_geometry_stage_dispatch_width(compiler->devinfo));
brw_nir_apply_key(nir, compiler, &key->base, dispatch_width);
brw_nir_lower_vue_inputs(nir, &input_vue_map);
brw_nir_lower_tcs_outputs(nir, &vue_prog_data->vue_map,
key->_tes_primitive_mode);
@ -276,7 +276,6 @@ brw_compile_tcs(const struct brw_compiler *compiler,
brw_print_vue_map(stderr, &vue_prog_data->vue_map, MESA_SHADER_TESS_CTRL);
}
const unsigned dispatch_width = devinfo->ver >= 20 ? 16 : 8;
fs_visitor v(compiler, &params->base, &key->base,
&prog_data->base.base, nir, dispatch_width,
params->base.stats != NULL, debug_enabled);

5
src/intel/compiler/brw_compile_tes.cpp
View file

@ -68,6 +68,7 @@ brw_compile_tes(const struct brw_compiler *compiler,
const struct brw_tes_prog_key *key = params->key;
const struct intel_vue_map *input_vue_map = params->input_vue_map;
struct brw_tes_prog_data *prog_data = params->prog_data;
const unsigned dispatch_width = brw_geometry_stage_dispatch_width(compiler->devinfo);
const bool debug_enabled = brw_should_print_shader(nir, DEBUG_TES);
@ -77,8 +78,7 @@ brw_compile_tes(const struct brw_compiler *compiler,
nir->info.inputs_read = key->inputs_read;
nir->info.patch_inputs_read = key->patch_inputs_read;
brw_nir_apply_key(nir, compiler, &key->base,
brw_geometry_stage_dispatch_width(compiler->devinfo));
brw_nir_apply_key(nir, compiler, &key->base, dispatch_width);
brw_nir_lower_tes_inputs(nir, input_vue_map);
brw_nir_lower_vue_outputs(nir);
brw_postprocess_nir(nir, compiler, debug_enabled,
@ -153,7 +153,6 @@ brw_compile_tes(const struct brw_compiler *compiler,
MESA_SHADER_TESS_EVAL);
}
const unsigned dispatch_width = devinfo->ver >= 20 ? 16 : 8;
fs_visitor v(compiler, &params->base, &key->base,
&prog_data->base.base, nir, dispatch_width,
params->base.stats != NULL, debug_enabled);

5
src/intel/compiler/brw_compile_vs.cpp
View file

@ -72,13 +72,13 @@ brw_compile_vs(const struct brw_compiler *compiler,
const bool debug_enabled =
brw_should_print_shader(nir, params->base.debug_flag ?
params->base.debug_flag : DEBUG_VS);
const unsigned dispatch_width = brw_geometry_stage_dispatch_width(compiler->devinfo);
prog_data->base.base.stage = MESA_SHADER_VERTEX;
prog_data->base.base.ray_queries = nir->info.ray_queries;
prog_data->base.base.total_scratch = 0;
brw_nir_apply_key(nir, compiler, &key->base,
brw_geometry_stage_dispatch_width(compiler->devinfo));
brw_nir_apply_key(nir, compiler, &key->base, dispatch_width);
prog_data->inputs_read = nir->info.inputs_read;
prog_data->double_inputs_read = nir->info.vs.double_inputs;
@ -147,7 +147,6 @@ brw_compile_vs(const struct brw_compiler *compiler,
brw_print_vue_map(stderr, &prog_data->base.vue_map, MESA_SHADER_VERTEX);
}
const unsigned dispatch_width = compiler->devinfo->ver >= 20 ? 16 : 8;
prog_data->base.dispatch_mode = INTEL_DISPATCH_MODE_SIMD8;
fs_visitor v(compiler, &params->base, &key->base,