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radv: Add winsys functions for timeline syncobj.
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5600>
This commit is contained in:
parent
66e598d0a6
commit
55d8022878
4 changed files with 57 additions and 6 deletions
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@ -7325,7 +7325,7 @@ static VkResult radv_import_sync_fd(struct radv_device *device,
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}
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}
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} else {
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} else {
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if (fd == -1)
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if (fd == -1)
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device->ws->signal_syncobj(device->ws, syncobj_handle);
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device->ws->signal_syncobj(device->ws, syncobj_handle, 0);
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}
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}
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if (fd != -1) {
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if (fd != -1) {
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@ -328,9 +328,12 @@ struct radeon_winsys {
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void (*destroy_syncobj)(struct radeon_winsys *ws, uint32_t handle);
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void (*destroy_syncobj)(struct radeon_winsys *ws, uint32_t handle);
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void (*reset_syncobj)(struct radeon_winsys *ws, uint32_t handle);
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void (*reset_syncobj)(struct radeon_winsys *ws, uint32_t handle);
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void (*signal_syncobj)(struct radeon_winsys *ws, uint32_t handle);
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void (*signal_syncobj)(struct radeon_winsys *ws, uint32_t handle, uint64_t point);
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VkResult (*query_syncobj)(struct radeon_winsys *ws, uint32_t handle, uint64_t *point);
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bool (*wait_syncobj)(struct radeon_winsys *ws, const uint32_t *handles, uint32_t handle_count,
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bool (*wait_syncobj)(struct radeon_winsys *ws, const uint32_t *handles, uint32_t handle_count,
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bool wait_all, uint64_t timeout);
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bool wait_all, uint64_t timeout);
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bool (*wait_timeline_syncobj)(struct radeon_winsys *ws, const uint32_t *handles, const uint64_t *points,
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uint32_t handle_count, bool wait_all, bool available, uint64_t timeout);
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int (*export_syncobj)(struct radeon_winsys *ws, uint32_t syncobj, int *fd);
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int (*export_syncobj)(struct radeon_winsys *ws, uint32_t syncobj, int *fd);
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int (*import_syncobj)(struct radeon_winsys *ws, int fd, uint32_t *syncobj);
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int (*import_syncobj)(struct radeon_winsys *ws, int fd, uint32_t *syncobj);
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@ -270,7 +270,7 @@ VkResult radv_AcquireNextImage2KHR(
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device->ws->signal_fence(part->fence);
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device->ws->signal_fence(part->fence);
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break;
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break;
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case RADV_FENCE_SYNCOBJ:
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case RADV_FENCE_SYNCOBJ:
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device->ws->signal_syncobj(device->ws, part->syncobj);
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device->ws->signal_syncobj(device->ws, part->syncobj, 0);
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break;
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break;
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default:
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default:
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unreachable("Invalid WSI fence type");
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unreachable("Invalid WSI fence type");
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@ -289,7 +289,7 @@ VkResult radv_AcquireNextImage2KHR(
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case RADV_SEMAPHORE_TIMELINE:
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case RADV_SEMAPHORE_TIMELINE:
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unreachable("WSI only allows binary semaphores.");
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unreachable("WSI only allows binary semaphores.");
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case RADV_SEMAPHORE_SYNCOBJ:
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case RADV_SEMAPHORE_SYNCOBJ:
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device->ws->signal_syncobj(device->ws, part->syncobj);
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device->ws->signal_syncobj(device->ws, part->syncobj, 0);
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break;
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break;
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}
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}
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}
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}
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@ -1832,10 +1832,30 @@ static void radv_amdgpu_reset_syncobj(struct radeon_winsys *_ws,
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}
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}
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static void radv_amdgpu_signal_syncobj(struct radeon_winsys *_ws,
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static void radv_amdgpu_signal_syncobj(struct radeon_winsys *_ws,
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uint32_t handle)
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uint32_t handle, uint64_t point)
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{
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{
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struct radv_amdgpu_winsys *ws = radv_amdgpu_winsys(_ws);
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struct radv_amdgpu_winsys *ws = radv_amdgpu_winsys(_ws);
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amdgpu_cs_syncobj_signal(ws->dev, &handle, 1);
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if (point)
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amdgpu_cs_syncobj_timeline_signal(ws->dev, &handle, &point, 1);
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else
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amdgpu_cs_syncobj_signal(ws->dev, &handle, 1);
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}
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static VkResult radv_amdgpu_query_syncobj(struct radeon_winsys *_ws,
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uint32_t handle, uint64_t *point)
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{
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struct radv_amdgpu_winsys *ws = radv_amdgpu_winsys(_ws);
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int ret = amdgpu_cs_syncobj_query(ws->dev, &handle, point, 1);
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if (ret == 0)
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return VK_SUCCESS;
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else if (ret == -ENOMEM)
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return VK_ERROR_OUT_OF_HOST_MEMORY;
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else {
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/* Remaining error are driver internal issues: EFAULT for
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* dangling pointers and ENOENT for non-existing syncobj. */
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fprintf(stderr, "amdgpu: internal error in radv_amdgpu_query_syncobj. (%d)\n", ret);
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return VK_ERROR_UNKNOWN;
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}
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}
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}
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static bool radv_amdgpu_wait_syncobj(struct radeon_winsys *_ws, const uint32_t *handles,
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static bool radv_amdgpu_wait_syncobj(struct radeon_winsys *_ws, const uint32_t *handles,
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@ -1861,6 +1881,32 @@ static bool radv_amdgpu_wait_syncobj(struct radeon_winsys *_ws, const uint32_t *
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}
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}
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}
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}
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static bool radv_amdgpu_wait_timeline_syncobj(struct radeon_winsys *_ws, const uint32_t *handles,
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const uint64_t *points, uint32_t handle_count,
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bool wait_all, bool available, uint64_t timeout)
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{
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struct radv_amdgpu_winsys *ws = radv_amdgpu_winsys(_ws);
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/* The timeouts are signed, while vulkan timeouts are unsigned. */
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timeout = MIN2(timeout, INT64_MAX);
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int ret = amdgpu_cs_syncobj_timeline_wait(ws->dev, (uint32_t*)handles, (uint64_t*)points,
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handle_count, timeout,
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DRM_SYNCOBJ_WAIT_FLAGS_WAIT_FOR_SUBMIT |
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(wait_all ? DRM_SYNCOBJ_WAIT_FLAGS_WAIT_ALL : 0) |
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(available ? DRM_SYNCOBJ_WAIT_FLAGS_WAIT_AVAILABLE : 0),
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NULL);
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if (ret == 0) {
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return true;
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} else if (ret == -ETIME) {
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return false;
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} else {
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fprintf(stderr, "amdgpu: radv_amdgpu_wait_syncobj failed! (%d)\n", errno);
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return false;
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}
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}
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static int radv_amdgpu_export_syncobj(struct radeon_winsys *_ws,
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static int radv_amdgpu_export_syncobj(struct radeon_winsys *_ws,
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uint32_t syncobj,
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uint32_t syncobj,
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int *fd)
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int *fd)
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@ -1923,7 +1969,9 @@ void radv_amdgpu_cs_init_functions(struct radv_amdgpu_winsys *ws)
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ws->base.destroy_syncobj = radv_amdgpu_destroy_syncobj;
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ws->base.destroy_syncobj = radv_amdgpu_destroy_syncobj;
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ws->base.reset_syncobj = radv_amdgpu_reset_syncobj;
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ws->base.reset_syncobj = radv_amdgpu_reset_syncobj;
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ws->base.signal_syncobj = radv_amdgpu_signal_syncobj;
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ws->base.signal_syncobj = radv_amdgpu_signal_syncobj;
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ws->base.query_syncobj = radv_amdgpu_query_syncobj;
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ws->base.wait_syncobj = radv_amdgpu_wait_syncobj;
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ws->base.wait_syncobj = radv_amdgpu_wait_syncobj;
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ws->base.wait_timeline_syncobj = radv_amdgpu_wait_timeline_syncobj;
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ws->base.export_syncobj = radv_amdgpu_export_syncobj;
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ws->base.export_syncobj = radv_amdgpu_export_syncobj;
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ws->base.import_syncobj = radv_amdgpu_import_syncobj;
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ws->base.import_syncobj = radv_amdgpu_import_syncobj;
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ws->base.export_syncobj_to_sync_file = radv_amdgpu_export_syncobj_to_sync_file;
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ws->base.export_syncobj_to_sync_file = radv_amdgpu_export_syncobj_to_sync_file;
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