From 55baf0c676a33a29aa8fb26e506e44eed598c091 Mon Sep 17 00:00:00 2001 From: Mike Blumenkrantz Date: Thu, 14 Apr 2022 14:19:02 -0400 Subject: [PATCH] zink: fix tcs control barriers for use without vk memory model these are translated into memory+control barriers in nir, and only the control barrier needs to be handled these semantics match what glslang does, so they must be right cc: mesa-stable Reviewed-by: Dave Airlie Part-of: --- src/gallium/drivers/zink/nir_to_spirv/nir_to_spirv.c | 12 +++++++----- 1 file changed, 7 insertions(+), 5 deletions(-) diff --git a/src/gallium/drivers/zink/nir_to_spirv/nir_to_spirv.c b/src/gallium/drivers/zink/nir_to_spirv/nir_to_spirv.c index badb02b795f..b5b324a000e 100644 --- a/src/gallium/drivers/zink/nir_to_spirv/nir_to_spirv.c +++ b/src/gallium/drivers/zink/nir_to_spirv/nir_to_spirv.c @@ -2913,8 +2913,7 @@ emit_intrinsic(struct ntv_context *ctx, nir_intrinsic_instr *intr) break; case nir_intrinsic_memory_barrier_tcs_patch: - spirv_builder_emit_memory_barrier(&ctx->builder, SpvScopeWorkgroup, - SpvMemorySemanticsOutputMemoryMask | SpvMemorySemanticsReleaseMask); + /* handled by subsequent nir_intrinsic_control_barrier */ break; case nir_intrinsic_memory_barrier: @@ -2942,9 +2941,12 @@ emit_intrinsic(struct ntv_context *ctx, nir_intrinsic_instr *intr) break; case nir_intrinsic_control_barrier: - spirv_builder_emit_control_barrier(&ctx->builder, SpvScopeWorkgroup, - SpvScopeWorkgroup, - SpvMemorySemanticsWorkgroupMemoryMask | SpvMemorySemanticsAcquireMask); + if (ctx->stage == MESA_SHADER_COMPUTE) + spirv_builder_emit_control_barrier(&ctx->builder, SpvScopeWorkgroup, + SpvScopeWorkgroup, + SpvMemorySemanticsWorkgroupMemoryMask | SpvMemorySemanticsAcquireMask); + else + spirv_builder_emit_control_barrier(&ctx->builder, SpvScopeWorkgroup, SpvScopeInvocation, 0); break; case nir_intrinsic_interp_deref_at_centroid: