From 5592c366cf1aa09dcc84797a37d62855ad6591e3 Mon Sep 17 00:00:00 2001 From: Danylo Piliaiev Date: Fri, 13 May 2022 17:10:36 +0300 Subject: [PATCH] freedreno: Document rest of GRAS_LRZ_CNTL, clarify UNK_25 event Signed-off-by: Danylo Piliaiev Part-of: --- src/freedreno/registers/adreno/a6xx.xml | 22 ++++++++++++++----- src/freedreno/registers/adreno/adreno_pm4.xml | 13 ++++++++++- src/gallium/drivers/freedreno/a6xx/fd6_gmem.c | 2 +- 3 files changed, 30 insertions(+), 7 deletions(-) diff --git a/src/freedreno/registers/adreno/a6xx.xml b/src/freedreno/registers/adreno/a6xx.xml index 796cfb59825..5cf4495ba65 100644 --- a/src/freedreno/registers/adreno/a6xx.xml +++ b/src/freedreno/registers/adreno/a6xx.xml @@ -1773,11 +1773,13 @@ to upconvert to 32b float internally? + + + + + + - LRZ write also disabled for blend/etc. @@ -1787,7 +1789,17 @@ to upconvert to 32b float internally? - + + + If DISABLE_ON_WRONG_DIR enabled - write new LRZ direction into + buffer, in case of mismatched direction writes 0 (disables LRZ). + + + + Disable LRZ based on previous direction and the current one. + If DIR_WRITE is not enabled - there is no write to direction buffer. + + diff --git a/src/freedreno/registers/adreno/adreno_pm4.xml b/src/freedreno/registers/adreno/adreno_pm4.xml index 0b3bf0f1686..153d01e3afc 100644 --- a/src/freedreno/registers/adreno/adreno_pm4.xml +++ b/src/freedreno/registers/adreno/adreno_pm4.xml @@ -43,7 +43,18 @@ xsi:schemaLocation="http://nouveau.freedesktop.org/ rules-ng.xsd"> - + + Clears based on GRAS_LRZ_CNTL configuration, could clear + fast-clear buffer or LRZ direction. + LRZ direction is stored at lrz_fc_offset + 0x200, has 1 byte which + could be expressed by enum: + CUR_DIR_DISABLED = 0x0 + CUR_DIR_GE = 0x1 + CUR_DIR_LE = 0x2 + CUR_DIR_UNSET = 0x3 + Clear of direction means setting the direction to CUR_DIR_UNSET. + + diff --git a/src/gallium/drivers/freedreno/a6xx/fd6_gmem.c b/src/gallium/drivers/freedreno/a6xx/fd6_gmem.c index 4257b2fe3c3..40c5c85efda 100644 --- a/src/gallium/drivers/freedreno/a6xx/fd6_gmem.c +++ b/src/gallium/drivers/freedreno/a6xx/fd6_gmem.c @@ -200,7 +200,7 @@ emit_zs(struct fd_ringbuffer *ring, struct pipe_surface *zsbuf, * plus this CP_EVENT_WRITE at the end in it's own IB.. */ OUT_PKT7(ring, CP_EVENT_WRITE, 1); - OUT_RING(ring, CP_EVENT_WRITE_0_EVENT(UNK_25)); + OUT_RING(ring, CP_EVENT_WRITE_0_EVENT(LRZ_CLEAR)); if (rsc->stencil) { stride = fd_resource_pitch(rsc->stencil, zsbuf->u.tex.level);