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intel/gen: Create gen_info_util.h

Browse source 
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Acked-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41413>
This commit is contained in:
Jordan Justen 2026-03-25 15:44:47 -07:00 • committed by Marge Bot
parent 068ea94ca3
commit 558348d7ec
4 changed files with 49 additions and 50 deletions
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29
src/intel/compiler/gen/gen_encoding.cpp
View file

@ -13,6 +13,8 @@
#include "gen_private.h"
#include "gen_info_util.h"
enum {
GEN_SYSTOLIC_DEPTH_16 = 0,
GEN_SYSTOLIC_DEPTH_2 = 1,
@ -165,39 +167,12 @@ gen_inst_is_unordered(const intel_device_info *devinfo,
inst_has_type(devinfo, inst, GEN_TYPE_DF));
}
enum gen_encoding_type {
GEN_ENCODING_XE,
GEN_ENCODING_XE2,
};
#define FIELD(name, high, low) \
static constexpr gen_range name = { .hi = high, .lo = low };
#define SUB_FIELD(name, high, low) \
static constexpr gen_sub_range name = { .hi = high, .lo = low };
/* Provide some clue in the compiler error if this gets used wrongly. */
struct gen_invalid_range {};
#define DELETE_FIELD(name) \
static constexpr gen_invalid_range name = {};
struct gen_inst_description {
gen_opcode gen_op = GEN_OP_ILLEGAL;
gen_format format = GEN_FORMAT_ILLEGAL;
unsigned hw_opcode = 0;
bool has_dst = false;
constexpr gen_inst_description() = default;
constexpr gen_inst_description(gen_opcode op, unsigned hw)
: gen_op(op),
format(gen_inst_format(op)),
hw_opcode(hw),
has_dst(gen_inst_has_dst(format, op))
{}
};
static constexpr
std::array<gen_inst_description, 128> gen_sort_by_hw_opcode(const std::array<gen_inst_description, 128> &table) {
std::array<gen_inst_description, 128> r;

25
src/intel/compiler/gen/gen_encoding_pre_xe.cpp
View file

@ -9,6 +9,8 @@
#include "gen_private.h"
#include "gen_info_util.h"
#define WIDTH(width) (1 << (width))
inline unsigned
@ -29,12 +31,6 @@ DECODE_VSTRIDE(unsigned raw_value)
return STRIDE(raw_value);
}
#define FIELD(name, high, low) \
static constexpr gen_range name = { .hi = high, .lo = low };
#define SUB_FIELD(name, high, low) \
static constexpr gen_sub_range name = { .hi = high, .lo = low };
FIELD(HW_OPCODE, 6, 0);
FIELD(CONTROLS, 31, 8);
FIELD(OPERAND_CONTROLS, 63, 32);
@ -215,23 +211,6 @@ SUB_FIELD(CONTROLS_A, 15, 0);
SUB_FIELD(COND_MODIFIER, 19, 16);
SUB_FIELD(CONTROLS_B, 23, 20);
struct gen_inst_description {
gen_opcode gen_op = GEN_OP_ILLEGAL;
gen_format format = GEN_FORMAT_ILLEGAL;
unsigned hw_opcode = 0;
bool has_dst = false;
constexpr gen_inst_description() = default;
constexpr gen_inst_description(gen_opcode op, unsigned hw)
: gen_op(op),
format(gen_inst_format(op)),
hw_opcode(hw),
has_dst(gen_inst_has_dst(format, op))
{}
};
static constexpr std::array<gen_inst_description, 128> gen_to_description = []() constexpr {
std::array<gen_inst_description, 128> r;
r[GEN_OP_ILLEGAL] = gen_inst_description(GEN_OP_ILLEGAL, 0);

44
src/intel/compiler/gen/gen_info_util.h Normal file
View file

@ -0,0 +1,44 @@
/*
* Copyright © 2026 Intel Corporation
* SPDX-License-Identifier: MIT
*
* Autogenerated file, do not edit!
*/
#pragma once
#ifdef __cplusplus
extern "C" {
#endif
enum gen_encoding_type {
GEN_ENCODING_PRE_XE,
GEN_ENCODING_XE,
GEN_ENCODING_XE2,
};
#define FIELD(name, high, low) \
static constexpr gen_range name = { .hi = high, .lo = low };
#define SUB_FIELD(name, high, low) \
static constexpr gen_sub_range name = { .hi = high, .lo = low };
struct gen_inst_description {
gen_opcode gen_op = GEN_OP_ILLEGAL;
gen_format format = GEN_FORMAT_ILLEGAL;
uint8_t hw_opcode = 0;
bool has_dst = false;
constexpr gen_inst_description() = default;
constexpr gen_inst_description(gen_opcode op, unsigned hw)
: gen_op(op),
format(gen_inst_format(op)),
hw_opcode(hw),
has_dst(gen_inst_has_dst(format, op))
{}
};
#ifdef __cplusplus
}
#endif

1
src/intel/compiler/gen/meson.build
View file

@ -7,6 +7,7 @@ libintel_compiler_gen_files = files(
'gen_types.h',
'gen_helpers.h',
'gen_names.h',
'gen_info_util.h',
'gen_private.h',