radeonsi: add support for geometry shader invocations.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
This commit is contained in:
Dave Airlie 2015-06-25 03:55:54 +01:00
parent 7e5064360c
commit 556dd4af76
5 changed files with 14 additions and 2 deletions

View file

@ -104,7 +104,7 @@ GL 4.0, GLSL 4.00:
- Fused multiply-add DONE ()
- Packing/bitfield/conversion functions DONE (r600, radeonsi, softpipe)
- Enhanced textureGather DONE (r600, radeonsi, softpipe)
- Geometry shader instancing DONE (r600, llvmpipe, softpipe)
- Geometry shader instancing DONE (r600, radeonsi, llvmpipe, softpipe)
- Geometry shader multiple streams DONE ()
- Enhanced per-sample shading DONE (r600, radeonsi)
- Interpolation functions DONE (r600)

View file

@ -630,6 +630,11 @@ static void declare_system_value(
SI_PARAM_BASE_VERTEX);
break;
case TGSI_SEMANTIC_INVOCATIONID:
value = LLVMGetParam(radeon_bld->main_fn,
SI_PARAM_GS_INSTANCE_ID);
break;
case TGSI_SEMANTIC_SAMPLEID:
value = get_sample_id(radeon_bld);
break;

View file

@ -115,6 +115,7 @@ struct si_shader_selector {
unsigned gs_output_prim;
unsigned gs_max_out_vertices;
unsigned gs_num_invocations;
uint64_t gs_used_inputs; /* mask of "get_unique_index" bits */
};

View file

@ -3078,7 +3078,6 @@ void si_init_config(struct si_context *sctx)
si_pm4_set_reg(pm4, R_028B60_VGT_GS_VERT_ITEMSIZE_1, 0);
si_pm4_set_reg(pm4, R_028B64_VGT_GS_VERT_ITEMSIZE_2, 0);
si_pm4_set_reg(pm4, R_028B68_VGT_GS_VERT_ITEMSIZE_3, 0);
si_pm4_set_reg(pm4, R_028B90_VGT_GS_INSTANCE_CNT, 0);
si_pm4_set_reg(pm4, R_028B98_VGT_STRMOUT_BUFFER_CONFIG, 0x0);
si_pm4_set_reg(pm4, R_028AB4_VGT_REUSE_OFF, 0);

View file

@ -76,6 +76,7 @@ static void si_shader_gs(struct si_shader *shader)
unsigned gs_vert_itemsize = shader->selector->info.num_outputs * (16 >> 2);
unsigned gs_max_vert_out = shader->selector->gs_max_out_vertices;
unsigned gsvs_itemsize = gs_vert_itemsize * gs_max_vert_out;
unsigned gs_num_invocations = shader->selector->gs_num_invocations;
unsigned cut_mode;
struct si_pm4_state *pm4;
unsigned num_sgprs, num_user_sgprs;
@ -118,6 +119,10 @@ static void si_shader_gs(struct si_shader *shader)
si_pm4_set_reg(pm4, R_028B5C_VGT_GS_VERT_ITEMSIZE, gs_vert_itemsize);
si_pm4_set_reg(pm4, R_028B90_VGT_GS_INSTANCE_CNT,
S_028B90_CNT(MIN2(gs_num_invocations, 127)) |
S_028B90_ENABLE(gs_num_invocations > 0));
va = shader->bo->gpu_address;
si_pm4_add_bo(pm4, shader->bo, RADEON_USAGE_READ, RADEON_PRIO_SHADER_DATA);
si_pm4_set_reg(pm4, R_00B220_SPI_SHADER_PGM_LO_GS, va >> 8);
@ -490,6 +495,8 @@ static void *si_create_shader_state(struct pipe_context *ctx,
sel->info.properties[TGSI_PROPERTY_GS_OUTPUT_PRIM];
sel->gs_max_out_vertices =
sel->info.properties[TGSI_PROPERTY_GS_MAX_OUTPUT_VERTICES];
sel->gs_num_invocations =
sel->info.properties[TGSI_PROPERTY_GS_INVOCATIONS];
for (i = 0; i < sel->info.num_inputs; i++) {
unsigned name = sel->info.input_semantic_name[i];