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ir_to_mesa: Move the classes into the file now that we don't have the burg.

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At 1kloc, it doesn't look like I'll want to split the ir_to_mesa file
up even once it's feature-complete.  Move definitions closer to usage,
and prevent rebuilding the world when changing the definitions.
This commit is contained in:
Eric Anholt 2010-06-03 09:31:46 -07:00
parent 2401338ef8
commit 554dbcce77
3 changed files with 115 additions and 159 deletions
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2
glsl_parser_extras.h
View file

@ -134,4 +134,6 @@ extern bool _mesa_glsl_process_extension(const char *name, YYLTYPE *name_locp,
extern const char *
_mesa_glsl_shader_target_name(enum _mesa_glsl_parser_targets target);
void do_ir_to_mesa(exec_list *instructions);
#endif /* GLSL_PARSER_EXTRAS_H */

120
ir_to_mesa.cpp
View file

@ -28,16 +28,9 @@
* printing the result
*/
/* Quiet compiler warnings due to monoburg not marking functions defined
* in the header as inline.
*/
#define g_new
#define g_error
#include <stdio.h>
#include "ir.h"
#include "ir_visitor.h"
#include "ir_to_mesa.h"
#include "ir_print_visitor.h"
#include "ir_expression_flattening.h"
#include "glsl_types.h"
@ -47,6 +40,119 @@ extern "C" {
#include "shader/prog_print.h"
}
/**
* This struct is a corresponding struct to Mesa prog_src_register, with
* wider fields.
*/
typedef struct ir_to_mesa_src_reg {
int file; /**< PROGRAM_* from Mesa */
int index; /**< temporary index, VERT_ATTRIB_*, FRAG_ATTRIB_*, etc. */
int swizzle; /**< SWIZZLE_XYZWONEZERO swizzles from Mesa. */
int negate; /**< NEGATE_XYZW mask from mesa */
bool reladdr; /**< Register index should be offset by address reg. */
} ir_to_mesa_src_reg;
typedef struct ir_to_mesa_dst_reg {
int file; /**< PROGRAM_* from Mesa */
int index; /**< temporary index, VERT_ATTRIB_*, FRAG_ATTRIB_*, etc. */
int writemask; /**< Bitfield of WRITEMASK_[XYZW] */
} ir_to_mesa_dst_reg;
extern ir_to_mesa_src_reg ir_to_mesa_undef;
class ir_to_mesa_instruction : public exec_node {
public:
enum prog_opcode op;
ir_to_mesa_dst_reg dst_reg;
ir_to_mesa_src_reg src_reg[3];
/** Pointer to the ir source this tree came from for debugging */
ir_instruction *ir;
};
class temp_entry : public exec_node {
public:
temp_entry(ir_variable *var, int file, int index)
: file(file), index(index), var(var)
{
/* empty */
}
int file;
int index;
ir_variable *var; /* variable that maps to this, if any */
};
class ir_to_mesa_visitor : public ir_visitor {
public:
ir_to_mesa_visitor();
int next_temp;
int next_constant;
ir_to_mesa_src_reg get_temp(int size);
ir_to_mesa_src_reg get_temp_for_var(ir_variable *var);
struct ir_to_mesa_src_reg src_reg_for_float(float val);
/**
* \name Visit methods
*
* As typical for the visitor pattern, there must be one \c visit method for
* each concrete subclass of \c ir_instruction. Virtual base classes within
* the hierarchy should not have \c visit methods.
*/
/*@{*/
virtual void visit(ir_variable *);
virtual void visit(ir_loop *);
virtual void visit(ir_loop_jump *);
virtual void visit(ir_function_signature *);
virtual void visit(ir_function *);
virtual void visit(ir_expression *);
virtual void visit(ir_swizzle *);
virtual void visit(ir_dereference_variable *);
virtual void visit(ir_dereference_array *);
virtual void visit(ir_dereference_record *);
virtual void visit(ir_assignment *);
virtual void visit(ir_constant *);
virtual void visit(ir_call *);
virtual void visit(ir_return *);
virtual void visit(ir_texture *);
virtual void visit(ir_if *);
/*@}*/
struct ir_to_mesa_src_reg result;
/** List of temp_entry */
exec_list variable_storage;
/** List of ir_to_mesa_instruction */
exec_list instructions;
ir_to_mesa_instruction *ir_to_mesa_emit_op1(ir_instruction *ir,
enum prog_opcode op,
ir_to_mesa_dst_reg dst,
ir_to_mesa_src_reg src0);
ir_to_mesa_instruction *ir_to_mesa_emit_op2(ir_instruction *ir,
enum prog_opcode op,
ir_to_mesa_dst_reg dst,
ir_to_mesa_src_reg src0,
ir_to_mesa_src_reg src1);
ir_to_mesa_instruction *ir_to_mesa_emit_op3(ir_instruction *ir,
enum prog_opcode op,
ir_to_mesa_dst_reg dst,
ir_to_mesa_src_reg src0,
ir_to_mesa_src_reg src1,
ir_to_mesa_src_reg src2);
void ir_to_mesa_emit_scalar_op1(ir_instruction *ir,
enum prog_opcode op,
ir_to_mesa_dst_reg dst,
ir_to_mesa_src_reg src0);
};
ir_to_mesa_src_reg ir_to_mesa_undef = {
PROGRAM_UNDEFINED, 0, SWIZZLE_NOOP, NEGATE_NONE, false,
};

152
ir_to_mesa.h
View file

@ -1,152 +0,0 @@
/*
* Copyright © 2010 Intel Corporation
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
* to deal in the Software without restriction, including without limitation
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
* and/or sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice (including the next
* paragraph) shall be included in all copies or substantial portions of the
* Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
* DEALINGS IN THE SOFTWARE.
*/
#include "ir.h"
extern "C" {
#include "shader/prog_instruction.h"
};
/**
* \file ir_to_mesa.h
*
* Translates the IR to Mesa IR if possible.
*/
/**
* This struct is a corresponding struct to Mesa prog_src_register, with
* wider fields.
*/
typedef struct ir_to_mesa_src_reg {
int file; /**< PROGRAM_* from Mesa */
int index; /**< temporary index, VERT_ATTRIB_*, FRAG_ATTRIB_*, etc. */
int swizzle; /**< SWIZZLE_XYZWONEZERO swizzles from Mesa. */
int negate; /**< NEGATE_XYZW mask from mesa */
bool reladdr; /**< Register index should be offset by address reg. */
} ir_to_mesa_src_reg;
typedef struct ir_to_mesa_dst_reg {
int file; /**< PROGRAM_* from Mesa */
int index; /**< temporary index, VERT_ATTRIB_*, FRAG_ATTRIB_*, etc. */
int writemask; /**< Bitfield of WRITEMASK_[XYZW] */
} ir_to_mesa_dst_reg;
extern ir_to_mesa_src_reg ir_to_mesa_undef;
class ir_to_mesa_instruction : public exec_node {
public:
enum prog_opcode op;
ir_to_mesa_dst_reg dst_reg;
ir_to_mesa_src_reg src_reg[3];
/** Pointer to the ir source this tree came from for debugging */
ir_instruction *ir;
};
void do_ir_to_mesa(exec_list *instructions);
class temp_entry : public exec_node {
public:
temp_entry(ir_variable *var, int file, int index)
: file(file), index(index), var(var)
{
/* empty */
}
int file;
int index;
ir_variable *var; /* variable that maps to this, if any */
};
class ir_to_mesa_visitor : public ir_visitor {
public:
ir_to_mesa_visitor();
int next_temp;
int next_constant;
ir_to_mesa_src_reg get_temp(int size);
ir_to_mesa_src_reg get_temp_for_var(ir_variable *var);
struct ir_to_mesa_src_reg src_reg_for_float(float val);
/**
* \name Visit methods
*
* As typical for the visitor pattern, there must be one \c visit method for
* each concrete subclass of \c ir_instruction. Virtual base classes within
* the hierarchy should not have \c visit methods.
*/
/*@{*/
virtual void visit(ir_variable *);
virtual void visit(ir_loop *);
virtual void visit(ir_loop_jump *);
virtual void visit(ir_function_signature *);
virtual void visit(ir_function *);
virtual void visit(ir_expression *);
virtual void visit(ir_swizzle *);
virtual void visit(ir_dereference_variable *);
virtual void visit(ir_dereference_array *);
virtual void visit(ir_dereference_record *);
virtual void visit(ir_assignment *);
virtual void visit(ir_constant *);
virtual void visit(ir_call *);
virtual void visit(ir_return *);
virtual void visit(ir_texture *);
virtual void visit(ir_if *);
/*@}*/
struct ir_to_mesa_src_reg result;
/** List of temp_entry */
exec_list variable_storage;
/** List of ir_to_mesa_instruction */
exec_list instructions;
ir_to_mesa_instruction *ir_to_mesa_emit_op1(ir_instruction *ir,
enum prog_opcode op,
ir_to_mesa_dst_reg dst,
ir_to_mesa_src_reg src0);
ir_to_mesa_instruction *ir_to_mesa_emit_op2(ir_instruction *ir,
enum prog_opcode op,
ir_to_mesa_dst_reg dst,
ir_to_mesa_src_reg src0,
ir_to_mesa_src_reg src1);
ir_to_mesa_instruction *ir_to_mesa_emit_op3(ir_instruction *ir,
enum prog_opcode op,
ir_to_mesa_dst_reg dst,
ir_to_mesa_src_reg src0,
ir_to_mesa_src_reg src1,
ir_to_mesa_src_reg src2);
void ir_to_mesa_emit_scalar_op1(ir_instruction *ir,
enum prog_opcode op,
ir_to_mesa_dst_reg dst,
ir_to_mesa_src_reg src0);
};
extern ir_to_mesa_src_reg ir_to_mesa_undef;
extern ir_to_mesa_dst_reg ir_to_mesa_undef_dst;