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freedreno: Don't program non-context reg with CRB
PC_UNKNOWN_9E72 is a non-context reg, and the weird hangs without duplicating a reg writes was due to using CP_CONTEXT_REG_BUNCH with it. Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37415>
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1 changed files with 4 additions and 11 deletions
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@ -831,7 +831,7 @@ fd6_emit_static_non_context_regs(struct fd_context *ctx, fd_cs &cs)
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{
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struct fd_screen *screen = ctx->screen;
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fd_ncrb<CHIP> ncrb(cs, 27 + ARRAY_SIZE(screen->info->a6xx.magic_raw));
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fd_ncrb<CHIP> ncrb(cs, 28 + ARRAY_SIZE(screen->info->a6xx.magic_raw));
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if (CHIP >= A7XX) {
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/* On A7XX, RB_CCU_CNTL was broken into two registers, RB_CCU_CNTL which has
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@ -907,6 +907,8 @@ fd6_emit_static_non_context_regs(struct fd_context *ctx, fd_cs &cs)
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ncrb.add(GRAS_BIN_FOVEAT(CHIP));
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ncrb.add(RB_BIN_FOVEAT(CHIP));
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}
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ncrb.add(A6XX_PC_UNKNOWN_9E72());
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}
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/**
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@ -936,15 +938,8 @@ fd6_emit_static_context_regs(struct fd_context *ctx, fd_cs &cs)
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);
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crb.add(A6XX_VFD_MODE_CNTL(.vertex = true, .instance = true));
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if (CHIP == A6XX) {
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if (CHIP == A6XX)
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crb.add(VPC_UNKNOWN_9107(CHIP));
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} else {
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/* This seems to be load-bearing, we need to set it both here
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* and below. Previously we were unconditionally zero'ing
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* VPC_UNKNOWN_9107 which happens to be the same offset.
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*/
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crb.add(VPC_RAST_STREAM_CNTL(CHIP));
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}
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crb.add(A6XX_RB_UNKNOWN_8811(.dword = 0x00000010));
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crb.add(PC_MODE_CNTL(CHIP, .dword=screen->info->a6xx.magic.PC_MODE_CNTL));
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crb.add(GRAS_LRZ_PS_INPUT_CNTL(CHIP));
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@ -982,8 +977,6 @@ fd6_emit_static_context_regs(struct fd_context *ctx, fd_cs &cs)
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crb.add(VPC_UNKNOWN_9210(CHIP));
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}
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crb.add(A6XX_PC_UNKNOWN_9E72());
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crb.add(A6XX_TPL1_MODE_CNTL(
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.isammode = ISAMMODE_GL,
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.texcoordroundmode = COORD_TRUNCATE,
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