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intel/vec4: Set channel_sizes for MOV_INDIRECT sources

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Otherwise, any indirect push constant access results in an assertion
failure when we start digging through the channel_sizes array.  This
fixes dEQP-VK.pipeline.push_constant.graphics_pipeline.dynamic_index_vert
on Haswell.  It should be a harmless no-op for GL since indirect push
constants aren't used there.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Fixes: e69e5c7006 "i965/vec4: load dvec3/4 uniforms first in the..."
(cherry picked from commit 2b977989f3)
This commit is contained in:
Jason Ekstrand 2018-03-23 09:27:55 -07:00 • committed by Juan A. Suarez Romero
parent 51b4bdc776
commit 542951a9f0
1 changed files with 4 additions and 1 deletions
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5
src/intel/compiler/brw_vec4.cpp
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@ -688,8 +688,11 @@ vec4_visitor::pack_uniform_registers()
* the next part of our packing algorithm.
*/
int reg = inst->src[0].nr;
for (unsigned i = 0; i < vec4s_read; i++)
int channel_size = type_sz(inst->src[0].type) / 4;
for (unsigned i = 0; i < vec4s_read; i++) {
chans_used[reg + i] = 4;
channel_sizes[reg + i] = MAX2(channel_sizes[reg + i], channel_size);
}
}
}