diff --git a/src/amd/vulkan/radv_queue.c b/src/amd/vulkan/radv_queue.c
index 1468d48f36c..173b298fcb3 100644
--- a/src/amd/vulkan/radv_queue.c
+++ b/src/amd/vulkan/radv_queue.c
@@ -215,6 +215,7 @@ radv_queue_submit_empty(struct radv_queue *queue, struct vk_queue_submit *submis
    struct radv_winsys_submit_info submit = {
       .ip_type = radv_queue_ring(queue),
       .queue_index = queue->vk.index_in_family,
+      .secure = submission->is_protected,
    };
 
    return device->ws->cs_submit(ctx, &submit, submission->wait_count, submission->waits, submission->signal_count,
@@ -1713,6 +1714,7 @@ radv_queue_submit_normal(struct radv_queue *queue, struct vk_queue_submit *submi
       .continue_preamble_cs = continue_preambles,
       .postamble_cs = postambles,
       .uses_shadow_regs = queue->state.uses_shadow_regs,
+      .secure = submission->is_protected,
    };
 
    for (uint32_t j = 0, advance; j < cmd_buffer_count; j += advance) {
diff --git a/src/amd/vulkan/radv_radeon_winsys.h b/src/amd/vulkan/radv_radeon_winsys.h
index 2544a8c1f05..47539caaa62 100644
--- a/src/amd/vulkan/radv_radeon_winsys.h
+++ b/src/amd/vulkan/radv_radeon_winsys.h
@@ -186,6 +186,7 @@ struct radv_winsys_submit_info {
    struct ac_cmdbuf **continue_preamble_cs;
    struct ac_cmdbuf **postamble_cs;
    bool uses_shadow_regs;
+   bool secure;
 };
 
 /* Kernel effectively allows 0-31. This sets some priorities for fixed
diff --git a/src/amd/vulkan/winsys/amdgpu/radv_amdgpu_cs.c b/src/amd/vulkan/winsys/amdgpu/radv_amdgpu_cs.c
index c01ddea854c..3d5688e2ccc 100644
--- a/src/amd/vulkan/winsys/amdgpu/radv_amdgpu_cs.c
+++ b/src/amd/vulkan/winsys/amdgpu/radv_amdgpu_cs.c
@@ -999,7 +999,8 @@ radv_amdgpu_winsys_cs_submit_internal(struct radv_amdgpu_ctx *ctx, int queue_idx
                                       struct ac_cmdbuf **cs_array, unsigned cs_count,
                                       struct ac_cmdbuf **initial_preamble_cs, unsigned initial_preamble_count,
                                       struct ac_cmdbuf **continue_preamble_cs, unsigned continue_preamble_count,
-                                      struct ac_cmdbuf **postamble_cs, unsigned postamble_count, bool uses_shadow_regs)
+                                      struct ac_cmdbuf **postamble_cs, unsigned postamble_count, bool uses_shadow_regs,
+                                      bool secure)
 {
    VkResult result;
 
@@ -1055,6 +1056,9 @@ radv_amdgpu_winsys_cs_submit_internal(struct radv_amdgpu_ctx *ctx, int queue_idx
          assert(cs->num_ib_buffers == 1);
          ib = radv_amdgpu_cs_ib_to_info(cs, cs->ib_buffers[0]);
 
+         if (secure && ((ib.ip_type == AMDGPU_HW_IP_GFX) || (ib.ip_type == AMDGPU_HW_IP_DMA)))
+            ib.flags |= AMDGPU_IB_FLAGS_SECURE;
+
          ibs[num_submitted_ibs++] = ib;
          ibs_per_ip[cs->hw_ip]++;
       }
@@ -1107,6 +1111,9 @@ radv_amdgpu_winsys_cs_submit_internal(struct radv_amdgpu_ctx *ctx, int queue_idx
          if (uses_shadow_regs && ib.ip_type == AMDGPU_HW_IP_GFX)
             ib.flags |= AMDGPU_IB_FLAG_PREEMPT;
 
+         if (secure && ((ib.ip_type == AMDGPU_HW_IP_GFX) || (ib.ip_type == AMDGPU_HW_IP_DMA)))
+            ib.flags |= AMDGPU_IB_FLAGS_SECURE;
+
          assert(num_submitted_ibs < ib_array_size);
          ibs[num_submitted_ibs++] = ib;
          ibs_per_ip[cs->hw_ip]++;
@@ -1310,7 +1317,7 @@ radv_amdgpu_winsys_cs_submit(struct radeon_winsys_ctx *_ctx, const struct radv_w
       result = radv_amdgpu_winsys_cs_submit_internal(
          ctx, submit->queue_index, &sem_info, submit->cs_array, submit->cs_count, submit->initial_preamble_cs,
          submit->initial_preamble_count, submit->continue_preamble_cs, submit->continue_preamble_count,
-         submit->postamble_cs, submit->postamble_count, submit->uses_shadow_regs);
+         submit->postamble_cs, submit->postamble_count, submit->uses_shadow_regs, submit->secure);
    }
 
 out: