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i965: Use immediate storage in brw_reg for visitor regs.
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
This commit is contained in:
parent
45446efc30
commit
53992a102f
6 changed files with 37 additions and 41 deletions
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@ -408,7 +408,7 @@ fs_reg::fs_reg(float f)
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init();
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this->file = IMM;
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this->type = BRW_REGISTER_TYPE_F;
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this->imm.f = f;
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this->fixed_hw_reg.dw1.f = f;
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}
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/** Immediate value constructor. */
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@ -417,7 +417,7 @@ fs_reg::fs_reg(int32_t i)
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init();
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this->file = IMM;
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this->type = BRW_REGISTER_TYPE_D;
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this->imm.i = i;
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this->fixed_hw_reg.dw1.d = i;
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}
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/** Immediate value constructor. */
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@ -426,7 +426,7 @@ fs_reg::fs_reg(uint32_t u)
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init();
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this->file = IMM;
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this->type = BRW_REGISTER_TYPE_UD;
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this->imm.u = u;
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this->fixed_hw_reg.dw1.ud = u;
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}
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/** Fixed brw_reg. */
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@ -451,8 +451,7 @@ fs_reg::equals(const fs_reg &r) const
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!reladdr && !r.reladdr &&
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memcmp(&fixed_hw_reg, &r.fixed_hw_reg,
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sizeof(fixed_hw_reg)) == 0 &&
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stride == r.stride &&
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imm.u == r.imm.u);
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stride == r.stride);
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}
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fs_reg &
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@ -486,7 +485,7 @@ fs_reg::is_zero() const
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if (file != IMM)
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return false;
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return type == BRW_REGISTER_TYPE_F ? imm.f == 0.0 : imm.i == 0;
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return fixed_hw_reg.dw1.d == 0;
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}
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bool
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@ -495,7 +494,9 @@ fs_reg::is_one() const
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if (file != IMM)
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return false;
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return type == BRW_REGISTER_TYPE_F ? imm.f == 1.0 : imm.i == 1;
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return type == BRW_REGISTER_TYPE_F
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? fixed_hw_reg.dw1.f == 1.0
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: fixed_hw_reg.dw1.d == 1;
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}
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bool
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@ -2031,7 +2032,7 @@ fs_visitor::opt_algebraic()
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case BRW_CONDITIONAL_L:
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switch (inst->src[1].type) {
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case BRW_REGISTER_TYPE_F:
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if (inst->src[1].imm.f >= 1.0f) {
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if (inst->src[1].fixed_hw_reg.dw1.f >= 1.0f) {
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inst->opcode = BRW_OPCODE_MOV;
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inst->src[1] = reg_undef;
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progress = true;
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@ -2045,7 +2046,7 @@ fs_visitor::opt_algebraic()
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case BRW_CONDITIONAL_G:
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switch (inst->src[1].type) {
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case BRW_REGISTER_TYPE_F:
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if (inst->src[1].imm.f <= 0.0f) {
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if (inst->src[1].fixed_hw_reg.dw1.f <= 0.0f) {
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inst->opcode = BRW_OPCODE_MOV;
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inst->src[1] = reg_undef;
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inst->conditional_mod = BRW_CONDITIONAL_NONE;
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@ -2540,7 +2541,7 @@ fs_visitor::lower_uniform_pull_constant_loads()
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fs_reg const_offset_reg = inst->src[1];
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assert(const_offset_reg.file == IMM &&
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const_offset_reg.type == BRW_REGISTER_TYPE_UD);
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const_offset_reg.imm.u /= 4;
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const_offset_reg.fixed_hw_reg.dw1.ud /= 4;
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fs_reg payload = fs_reg(this, glsl_type::uint_type);
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/* This is actually going to be a MOV, but since only the first dword
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@ -2752,13 +2753,13 @@ fs_visitor::dump_instruction(backend_instruction *be_inst, FILE *file)
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case IMM:
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switch (inst->src[i].type) {
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case BRW_REGISTER_TYPE_F:
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fprintf(file, "%ff", inst->src[i].imm.f);
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fprintf(file, "%ff", inst->src[i].fixed_hw_reg.dw1.f);
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break;
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case BRW_REGISTER_TYPE_D:
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fprintf(file, "%dd", inst->src[i].imm.i);
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fprintf(file, "%dd", inst->src[i].fixed_hw_reg.dw1.d);
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break;
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case BRW_REGISTER_TYPE_UD:
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fprintf(file, "%uu", inst->src[i].imm.u);
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fprintf(file, "%uu", inst->src[i].fixed_hw_reg.dw1.ud);
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break;
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default:
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fprintf(file, "???");
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@ -483,10 +483,10 @@ try_constant_propagate(struct brw_context *brw, fs_inst *inst,
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* anyway.
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*/
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assert(i == 0);
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if (inst->src[0].imm.f != 0.0f) {
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if (inst->src[0].fixed_hw_reg.dw1.f != 0.0f) {
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inst->opcode = BRW_OPCODE_MOV;
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inst->src[0] = entry->src;
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inst->src[0].imm.f = 1.0f / inst->src[0].imm.f;
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inst->src[0].fixed_hw_reg.dw1.f = 1.0f / inst->src[0].fixed_hw_reg.dw1.f;
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progress = true;
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}
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break;
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@ -1031,13 +1031,13 @@ brw_reg_from_fs_reg(fs_reg *reg)
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case IMM:
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switch (reg->type) {
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case BRW_REGISTER_TYPE_F:
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brw_reg = brw_imm_f(reg->imm.f);
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brw_reg = brw_imm_f(reg->fixed_hw_reg.dw1.f);
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break;
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case BRW_REGISTER_TYPE_D:
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brw_reg = brw_imm_d(reg->imm.i);
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brw_reg = brw_imm_d(reg->fixed_hw_reg.dw1.d);
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break;
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case BRW_REGISTER_TYPE_UD:
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brw_reg = brw_imm_ud(reg->imm.u);
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brw_reg = brw_imm_ud(reg->fixed_hw_reg.dw1.ud);
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break;
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default:
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unreachable("not reached");
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@ -91,7 +91,7 @@ src_reg::src_reg(float f)
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this->file = IMM;
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this->type = BRW_REGISTER_TYPE_F;
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this->imm.f = f;
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this->fixed_hw_reg.dw1.f = f;
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}
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src_reg::src_reg(uint32_t u)
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@ -100,7 +100,7 @@ src_reg::src_reg(uint32_t u)
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this->file = IMM;
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this->type = BRW_REGISTER_TYPE_UD;
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this->imm.u = u;
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this->fixed_hw_reg.dw1.ud = u;
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}
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src_reg::src_reg(int32_t i)
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@ -109,7 +109,7 @@ src_reg::src_reg(int32_t i)
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this->file = IMM;
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this->type = BRW_REGISTER_TYPE_D;
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this->imm.i = i;
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this->fixed_hw_reg.dw1.d = i;
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}
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src_reg::src_reg(struct brw_reg reg)
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@ -333,8 +333,7 @@ src_reg::equals(const src_reg &r) const
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swizzle == r.swizzle &&
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!reladdr && !r.reladdr &&
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memcmp(&fixed_hw_reg, &r.fixed_hw_reg,
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sizeof(fixed_hw_reg)) == 0 &&
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imm.u == r.imm.u);
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sizeof(fixed_hw_reg)) == 0);
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}
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static bool
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@ -608,11 +607,7 @@ src_reg::is_zero() const
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if (file != IMM)
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return false;
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if (type == BRW_REGISTER_TYPE_F) {
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return imm.f == 0.0;
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} else {
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return imm.i == 0;
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}
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return fixed_hw_reg.dw1.d == 0;
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}
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bool
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@ -622,9 +617,9 @@ src_reg::is_one() const
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return false;
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if (type == BRW_REGISTER_TYPE_F) {
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return imm.f == 1.0;
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return fixed_hw_reg.dw1.f == 1.0;
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} else {
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return imm.i == 1;
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return fixed_hw_reg.dw1.d == 1;
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}
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}
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@ -1335,13 +1330,13 @@ vec4_visitor::dump_instruction(backend_instruction *be_inst, FILE *file)
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case IMM:
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switch (inst->src[i].type) {
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case BRW_REGISTER_TYPE_F:
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fprintf(file, "%fF", inst->src[i].imm.f);
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fprintf(file, "%fF", inst->src[i].fixed_hw_reg.dw1.f);
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break;
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case BRW_REGISTER_TYPE_D:
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fprintf(file, "%dD", inst->src[i].imm.i);
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fprintf(file, "%dD", inst->src[i].fixed_hw_reg.dw1.d);
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break;
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case BRW_REGISTER_TYPE_UD:
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fprintf(file, "%uU", inst->src[i].imm.u);
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fprintf(file, "%uU", inst->src[i].fixed_hw_reg.dw1.ud);
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break;
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default:
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fprintf(file, "???");
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@ -92,18 +92,18 @@ try_constant_propagate(struct brw_context *brw, vec4_instruction *inst,
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if (inst->src[arg].abs) {
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if (value.type == BRW_REGISTER_TYPE_F) {
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value.imm.f = fabs(value.imm.f);
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value.fixed_hw_reg.dw1.f = fabs(value.fixed_hw_reg.dw1.f);
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} else if (value.type == BRW_REGISTER_TYPE_D) {
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if (value.imm.i < 0)
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value.imm.i = -value.imm.i;
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if (value.fixed_hw_reg.dw1.d < 0)
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value.fixed_hw_reg.dw1.d = -value.fixed_hw_reg.dw1.d;
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}
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}
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if (inst->src[arg].negate) {
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if (value.type == BRW_REGISTER_TYPE_F)
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value.imm.f = -value.imm.f;
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value.fixed_hw_reg.dw1.f = -value.fixed_hw_reg.dw1.f;
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else
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value.imm.u = -value.imm.u;
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value.fixed_hw_reg.dw1.ud = -value.fixed_hw_reg.dw1.ud;
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}
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switch (inst->opcode) {
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@ -84,13 +84,13 @@ vec4_instruction::get_src(const struct brw_vec4_prog_data *prog_data, int i)
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case IMM:
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switch (src[i].type) {
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case BRW_REGISTER_TYPE_F:
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brw_reg = brw_imm_f(src[i].imm.f);
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brw_reg = brw_imm_f(src[i].fixed_hw_reg.dw1.f);
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break;
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case BRW_REGISTER_TYPE_D:
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brw_reg = brw_imm_d(src[i].imm.i);
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brw_reg = brw_imm_d(src[i].fixed_hw_reg.dw1.d);
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break;
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case BRW_REGISTER_TYPE_UD:
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brw_reg = brw_imm_ud(src[i].imm.u);
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brw_reg = brw_imm_ud(src[i].fixed_hw_reg.dw1.ud);
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break;
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default:
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unreachable("not reached");
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