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pan/bi: Delete a few instruction encodings

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The non-trivial non-replicate swizzles on IADD.v4x8 and ISUB.v4x8 are
either documented wrong or broken in hardware.  Instead of swizzling
b0101 and b2323, they swizzle b0011 and b2233 on G52.  This is either a
hardware bug or an issue with documentation.  In either case, it's
probably best not to trust it.  Those swizzles aren't all that useful
anyway.  We also weren't using any of them before (or they'd have
broken) so this isn't a performance regression.

Cc: mesa-stable
Reviewed-by: Lorenzo Rossi <lorenzo.rossi@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40720>
This commit is contained in:
Faith Ekstrand 2026-03-30 20:59:46 -04:00 • committed by Marge Bot
parent 3fffcf4338
commit 538b5c411e
1 changed files with 36 additions and 0 deletions
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36
src/panfrost/compiler/bifrost/bifrost/ISA.xml
View file

@ -5350,8 +5350,15 @@
<opt>b1111</opt>
<opt>b2222</opt>
<opt>b3333</opt>
<!--
The docs claim that b0101 and b2323 are also supported but they don't
appear to work. Instead, they seem to be b0011 and b2233 swizzles in
practice. Instead of emitting shaders that violate the HW docs, we
simply don't claim support for these swizzles. These swizzles aren't
that useful anyway.
<opt>b0101</opt>
<opt>b2323</opt>
-->
</mod>
<encoding mask="0xffec0" exact="0xbc400">
<and>
@ -5376,6 +5383,7 @@
<eq left="lanes1" right="#b3333"/>
</derived>
</encoding>
<!--
<encoding mask="0xffcc0" exact="0xbe840">
<and>
<eq left="lanes0" right="#b0123"/>
@ -5389,6 +5397,7 @@
<eq left="lanes1" right="#b2323"/>
</derived>
</encoding>
-->
</ins>
<ins name="IADD.v4u8" unit="add">
@ -5404,8 +5413,15 @@
<opt>b1111</opt>
<opt>b2222</opt>
<opt>b3333</opt>
<!--
The docs claim that b0101 and b2323 are also supported but they don't
appear to work. Instead, they seem to be b0011 and b2233 swizzles in
practice. Instead of emitting shaders that violate the HW docs, we
simply don't claim support for these swizzles. These swizzles aren't
that useful anyway.
<opt>b0101</opt>
<opt>b2323</opt>
-->
</mod>
<encoding mask="0xffe40" exact="0xbc400">
<and>
@ -5438,6 +5454,7 @@
<eq left="lanes1" right="#b3333"/>
</derived>
</encoding>
<!--
<encoding mask="0xffc40" exact="0xbe840">
<and>
<eq left="lanes0" right="#b0123"/>
@ -5455,6 +5472,7 @@
<eq left="lanes1" right="#b2323"/>
</derived>
</encoding>
-->
</ins>
<ins name="ICMP.i32" mask="0xffb80" exact="0x7b300" unit="add">
@ -6075,8 +6093,15 @@
<opt>b1111</opt>
<opt>b2222</opt>
<opt>b3333</opt>
<!--
The docs claim that b0101 and b2323 are also supported but they don't
appear to work. Instead, they seem to be b0011 and b2233 swizzles in
practice. Instead of emitting shaders that violate the HW docs, we
simply don't claim support for these swizzles. These swizzles aren't
that useful anyway.
<opt>b0101</opt>
<opt>b2323</opt>
-->
</mod>
<encoding mask="0xffec0" exact="0xbd400">
<and>
@ -6101,6 +6126,7 @@
<eq left="lanes1" right="#b3333"/>
</derived>
</encoding>
<!--
<encoding mask="0xffcc0" exact="0xbf840">
<and>
<eq left="lanes0" right="#b0123"/>
@ -6114,6 +6140,7 @@
<eq left="lanes1" right="#b2323"/>
</derived>
</encoding>
-->
</ins>
<ins name="ISUB.v4u8" unit="add">
@ -6129,8 +6156,15 @@
<opt>b1111</opt>
<opt>b2222</opt>
<opt>b3333</opt>
<!--
The docs claim that b0101 and b2323 are also supported but they don't
appear to work. Instead, they seem to be b0011 and b2233 swizzles in
practice. Instead of emitting shaders that violate the HW docs, we
simply don't claim support for these swizzles. These swizzles aren't
that useful anyway.
<opt>b0101</opt>
<opt>b2323</opt>
-->
</mod>
<encoding mask="0xffe40" exact="0xbd400">
<and>
@ -6163,6 +6197,7 @@
<eq left="lanes1" right="#b3333"/>
</derived>
</encoding>
<!--
<encoding mask="0xffc40" exact="0xbf840">
<and>
<eq left="lanes0" right="#b0123"/>
@ -6180,6 +6215,7 @@
<eq left="lanes1" right="#b2323"/>
</derived>
</encoding>
-->
</ins>
<ins name="JUMP" mask="0xffe3f" exact="0x6fe34" last="true" dests="0" unit="add">