iris: Drop iris_resource_level_has_hiz()

This function disabled HiZ support when it encountered LODs which did
not satisfy a restriction of ISL_AUX_OP_AMBIGUATE for gfx8-9. Now that
the previous commit avoids that auxiliary operation for those platforms,
it is not so useful. Replace it with a simple check of the aux-usage.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36383>

src/gallium/drivers/iris/iris_clear.c

@@ -458,9 +458,6 @@ can_fast_clear_depth(struct iris_context *ice,
                      float depth)
 {
    struct pipe_resource *p_res = (void *) res;
-   struct pipe_context *ctx = (void *) ice;
-   struct iris_screen *screen = (void *) ctx->screen;
-   const struct intel_device_info *devinfo = screen->devinfo;
 
    if (INTEL_DEBUG(DEBUG_NO_FAST_CLEAR))
       return false;
@@ -481,7 +478,7 @@ can_fast_clear_depth(struct iris_context *ice,
       return false;
    }
 
-   if (!iris_resource_level_has_hiz(devinfo, res, level))
+   if (res->aux.usage == ISL_AUX_USAGE_NONE)
       return false;
 
    /* From the TGL PRM, Vol 9, "Compressed Depth Buffers" (under the

src/gallium/drivers/iris/iris_resolve.c

@@ -647,12 +647,6 @@ iris_sample_with_depth_aux(const struct intel_device_info *devinfo,
           res->surf.dim != ISL_SURF_DIM_2D)
          return false;
 
-      /* Make sure that HiZ exists for all necessary miplevels. */
-      for (unsigned level = 0; level < res->surf.levels; ++level) {
-         if (!iris_resource_level_has_hiz(devinfo, res, level))
-            return false;
-      }
-
       /* We can sample directly from HiZ in this case. */
       return true;
    default:
@@ -678,7 +672,7 @@ iris_hiz_exec(struct iris_context *ice,
 {
    ASSERTED const struct intel_device_info *devinfo = batch->screen->devinfo;
 
-   assert(iris_resource_level_has_hiz(devinfo, res, level));
+   assert(res->aux.usage != ISL_AUX_USAGE_NONE);
    assert(op != ISL_AUX_OP_NONE);
    UNUSED const char *name = NULL;
 
@@ -773,35 +767,6 @@ iris_hiz_exec(struct iris_context *ice,
    iris_batch_sync_region_end(batch);
 }
 
-/**
- * Does the resource's slice have hiz enabled?
- */
-bool
-iris_resource_level_has_hiz(const struct intel_device_info *devinfo,
-                            const struct iris_resource *res, uint32_t level)
-{
-   iris_resource_check_level_layer(res, level, 0);
-
-   if (!isl_aux_usage_has_hiz(res->aux.usage))
-      return false;
-
-   /* Disable HiZ for LOD > 0 unless the width/height are 8x4 aligned.
-    * For LOD == 0, we can grow the dimensions to make it work.
-    *
-    * This doesn't appear to be necessary on Gfx11+.  See details here:
-    * https://gitlab.freedesktop.org/mesa/mesa/-/issues/3788
-    */
-   if (devinfo->ver < 11 && level > 0) {
-      if (u_minify(res->base.b.width0, level) & 7)
-         return false;
-
-      if (u_minify(res->base.b.height0, level) & 3)
-         return false;
-   }
-
-   return true;
-}
-
 /** \brief Assert that the level and layer are valid for the resource. */
 void
 iris_resource_check_level_layer(UNUSED const struct iris_resource *res,
@@ -975,17 +940,9 @@ iris_resource_set_aux_state(struct iris_context *ice,
                             uint32_t start_layer, uint32_t num_layers,
                             enum isl_aux_state aux_state)
 {
-   struct iris_screen *screen = (void *) ice->ctx.screen;
-   ASSERTED const struct intel_device_info *devinfo = screen->devinfo;
-
    num_layers = miptree_layer_range_length(res, level, start_layer, num_layers);
 
-   if (res->surf.usage & ISL_SURF_USAGE_DEPTH_BIT) {
-      assert(iris_resource_level_has_hiz(devinfo, res, level) ||
-             !isl_aux_state_has_valid_aux(aux_state));
-   } else {
-      assert(res->aux.usage != ISL_AUX_USAGE_NONE);
-   }
+   assert(res->aux.usage != ISL_AUX_USAGE_NONE);
 
    for (unsigned a = 0; a < num_layers; a++) {
       if (res->aux.state[level][start_layer + a] != aux_state) {
@@ -1266,10 +1223,6 @@ iris_resource_render_aux_usage(struct iris_context *ice,
    case ISL_AUX_USAGE_HIZ:
    case ISL_AUX_USAGE_HIZ_CCS:
    case ISL_AUX_USAGE_HIZ_CCS_WT:
-      assert(render_format == res->surf.format);
-      return iris_resource_level_has_hiz(devinfo, res, level) ?
-             res->aux.usage : ISL_AUX_USAGE_NONE;
-
    case ISL_AUX_USAGE_STC_CCS:
       assert(render_format == res->surf.format);
       return res->aux.usage;

src/gallium/drivers/iris/iris_resource.h

@@ -483,10 +483,6 @@ bool iris_has_invalid_primary(const struct iris_resource *res,
 void iris_resource_check_level_layer(const struct iris_resource *res,
                                      uint32_t level, uint32_t layer);
 
-bool iris_resource_level_has_hiz(const struct intel_device_info *devinfo,
-                                 const struct iris_resource *res,
-                                 uint32_t level);
-
 bool iris_sample_with_depth_aux(const struct intel_device_info *devinfo,
                                 const struct iris_resource *res);
 

src/gallium/drivers/iris/iris_state.c

@@ -2081,8 +2081,6 @@ iris_bind_zsa_state(struct pipe_context *ctx, void *state)
 static bool
 want_pma_fix(struct iris_context *ice)
 {
-   UNUSED struct iris_screen *screen = (void *) ice->ctx.screen;
-   UNUSED const struct intel_device_info *devinfo = screen->devinfo;
    const struct iris_fs_data *fs_data =
       iris_fs_data(ice->shaders.prog[MESA_SHADER_FRAGMENT]);
    const struct pipe_framebuffer_state *cso_fb = &ice->state.framebuffer;
@@ -2156,8 +2154,7 @@ want_pma_fix(struct iris_context *ice)
    /* 3DSTATE_DEPTH_BUFFER::SURFACE_TYPE != NULL &&
     * 3DSTATE_DEPTH_BUFFER::HIZ Enable &&
     */
-   if (!zres ||
-       !iris_resource_level_has_hiz(devinfo, zres, cso_fb->zsbuf.level))
+   if (!zres || zres->aux.usage == ISL_AUX_USAGE_NONE)
       return false;
 
    /* 3DSTATE_WM::EDSC_Mode != EDSC_PREPS */
@@ -3926,7 +3923,7 @@ iris_set_framebuffer_state(struct pipe_context *ctx,
 
          view.format = zres->surf.format;
 
-         if (iris_resource_level_has_hiz(devinfo, zres, view.base_level)) {
+         if (zres->aux.usage != ISL_AUX_USAGE_NONE) {
             info.hiz_usage = zres->aux.usage;
             info.hiz_surf = &zres->aux.surf;
             info.hiz_address = zres->aux.bo->address + zres->aux.offset;
@@ -6742,7 +6739,7 @@ calculate_tile_dimensions(struct iris_context *ice,
          /* XXX - Pessimistic, in some cases it might be helpful to neglect
           *       aux surface traffic.
           */
-         if (iris_resource_level_has_hiz(devinfo, zres, cso->zsbuf.level)) {
+         if (zres->aux.usage != ISL_AUX_USAGE_NONE) {
             pixel_size += intel_calculate_surface_pixel_size(&zres->aux.surf);
 
             if (isl_aux_usage_has_ccs(zres->aux.usage)) {