From 536c8ee96dfcc25f07ba8dee4e3409e770a7f75a Mon Sep 17 00:00:00 2001 From: Emma Anholt Date: Mon, 25 Apr 2022 16:55:45 -0700 Subject: [PATCH] nir/lower_tex: Make the adding a 0 LOD to nir_op_tex in the VS optional. MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit This controls the whole lowering of "make tex ops with implicit derivatives on non-implicit-derivative stages be tex ops with an explicit lod of 0 instead", but it's really hard to describe that in a git commit summary. All existing callers get it added except: - nir_to_tgsi which didn't want it. - nouveau, which didn't want it (fixes regressions in shadowcube and shadow2darray with NIR, since the shading languages don't expose txl of those sampler types and thus it's not supported in HW) - optional lowering passes in mesa/st (lower_rect, YUV lowering, etc) Reviewed-by: Marek Olšák Reviewed-by: Jason Ekstrand Part-of: --- src/amd/vulkan/radv_shader.c | 1 + src/asahi/compiler/agx_compile.c | 1 + src/broadcom/compiler/vir.c | 1 + src/compiler/nir/nir.h | 6 ++++++ src/compiler/nir/nir_lower_tex.c | 3 ++- src/freedreno/ir3/ir3_nir.c | 1 + src/gallium/auxiliary/gallivm/lp_bld_nir.c | 3 ++- src/gallium/drivers/crocus/crocus_program.c | 4 +++- src/gallium/drivers/d3d12/d3d12_compiler.cpp | 1 + src/gallium/drivers/etnaviv/etnaviv_compiler_nir.c | 2 +- src/gallium/drivers/freedreno/a2xx/ir2_nir.c | 1 + src/gallium/drivers/lima/lima_program.c | 1 + src/gallium/drivers/lima/standalone/lima_compiler_cmdline.c | 1 + src/gallium/drivers/r600/sfn/sfn_nir.cpp | 1 + src/gallium/drivers/radeonsi/si_shader_nir.c | 1 + src/gallium/drivers/vc4/vc4_program.c | 1 + src/gallium/drivers/zink/zink_compiler.c | 4 +++- src/intel/compiler/brw_nir.c | 2 ++ src/microsoft/spirv_to_dxil/spirv_to_dxil.c | 4 +++- src/panfrost/bifrost/bifrost_compile.c | 1 + src/panfrost/midgard/midgard_compile.c | 1 + 21 files changed, 35 insertions(+), 6 deletions(-) diff --git a/src/amd/vulkan/radv_shader.c b/src/amd/vulkan/radv_shader.c index 4ad62a4c9c8..60ef16c037f 100644 --- a/src/amd/vulkan/radv_shader.c +++ b/src/amd/vulkan/radv_shader.c @@ -795,6 +795,7 @@ radv_shader_compile_to_nir(struct radv_device *device, const struct radv_pipelin .lower_txs_cube_array = true, .lower_to_fragment_fetch_amd = true, .lower_lod_zero_width = true, + .lower_invalid_implicit_lod = true, }; nir_lower_tex(nir, &tex_options); diff --git a/src/asahi/compiler/agx_compile.c b/src/asahi/compiler/agx_compile.c index 1decc88170e..1d6bb2a2cef 100644 --- a/src/asahi/compiler/agx_compile.c +++ b/src/asahi/compiler/agx_compile.c @@ -1517,6 +1517,7 @@ agx_compile_shader_nir(nir_shader *nir, nir_lower_tex_options lower_tex_options = { .lower_txs_lod = true, .lower_txp = ~0, + .lower_invalid_implicit_lod = true, }; nir_tex_src_type_constraints tex_constraints = { diff --git a/src/broadcom/compiler/vir.c b/src/broadcom/compiler/vir.c index 9d4fc587920..1a9ad5303d7 100644 --- a/src/broadcom/compiler/vir.c +++ b/src/broadcom/compiler/vir.c @@ -613,6 +613,7 @@ v3d_lower_nir(struct v3d_compile *c) .lower_txp = ~0, /* Apply swizzles to all samplers. */ .swizzle_result = ~0, + .lower_invalid_implicit_lod = true, }; /* Lower the format swizzle and (for 32-bit returns) diff --git a/src/compiler/nir/nir.h b/src/compiler/nir/nir.h index 68c495f1ce7..78bd2a15f06 100644 --- a/src/compiler/nir/nir.h +++ b/src/compiler/nir/nir.h @@ -5022,6 +5022,12 @@ typedef struct nir_lower_tex_options { */ bool lower_lod_zero_width; + /* Turns nir_op_tex and other ops with an implicit derivative, in stages + * without implicit derivatives (like the vertex shader) to have an explicit + * LOD with a value of 0. + */ + bool lower_invalid_implicit_lod; + /** * Payload data to be sent to callback / filter functions. */ diff --git a/src/compiler/nir/nir_lower_tex.c b/src/compiler/nir/nir_lower_tex.c index d011ee63759..9f7bccb81d9 100644 --- a/src/compiler/nir/nir_lower_tex.c +++ b/src/compiler/nir/nir_lower_tex.c @@ -1480,7 +1480,8 @@ nir_lower_tex_block(nir_block *block, nir_builder *b, * use an explicit LOD of 0. * But don't touch RECT samplers because they don't have mips. */ - if (nir_tex_instr_has_implicit_derivative(tex) && + if (options->lower_invalid_implicit_lod && + nir_tex_instr_has_implicit_derivative(tex) && tex->sampler_dim != GLSL_SAMPLER_DIM_RECT && !nir_shader_supports_implicit_lod(b->shader)) { lower_zero_lod(b, tex); diff --git a/src/freedreno/ir3/ir3_nir.c b/src/freedreno/ir3/ir3_nir.c index c08377e8ab9..61be4a37037 100644 --- a/src/freedreno/ir3/ir3_nir.c +++ b/src/freedreno/ir3/ir3_nir.c @@ -270,6 +270,7 @@ ir3_finalize_nir(struct ir3_compiler *compiler, nir_shader *s) struct nir_lower_tex_options tex_options = { .lower_rect = 0, .lower_tg4_offsets = true, + .lower_invalid_implicit_lod = true, }; if (compiler->gen >= 4) { diff --git a/src/gallium/auxiliary/gallivm/lp_bld_nir.c b/src/gallium/auxiliary/gallivm/lp_bld_nir.c index d7741abe7c1..88737797b1d 100644 --- a/src/gallium/auxiliary/gallivm/lp_bld_nir.c +++ b/src/gallium/auxiliary/gallivm/lp_bld_nir.c @@ -2497,6 +2497,7 @@ void lp_build_opt_nir(struct nir_shader *nir) static const struct nir_lower_tex_options lower_tex_options = { .lower_tg4_offsets = true, .lower_txp = ~0u, + .lower_invalid_implicit_lod = true, }; NIR_PASS_V(nir, nir_lower_tex, &lower_tex_options); NIR_PASS_V(nir, nir_lower_frexp); @@ -2509,7 +2510,7 @@ void lp_build_opt_nir(struct nir_shader *nir) NIR_PASS(progress, nir, nir_opt_algebraic); NIR_PASS(progress, nir, nir_lower_pack); - nir_lower_tex_options options = { 0, }; + nir_lower_tex_options options = { .lower_invalid_implicit_lod = true, }; NIR_PASS_V(nir, nir_lower_tex, &options); const nir_lower_subgroups_options subgroups_options = { diff --git a/src/gallium/drivers/crocus/crocus_program.c b/src/gallium/drivers/crocus/crocus_program.c index 6a6c58c734e..08e408cb334 100644 --- a/src/gallium/drivers/crocus/crocus_program.c +++ b/src/gallium/drivers/crocus/crocus_program.c @@ -216,7 +216,9 @@ static void crocus_lower_swizzles(struct nir_shader *nir, const struct brw_sampler_prog_key_data *key_tex) { - struct nir_lower_tex_options tex_options = { 0 }; + struct nir_lower_tex_options tex_options = { + .lower_invalid_implicit_lod = true, + }; uint32_t mask = nir->info.textures_used[0]; while (mask) { diff --git a/src/gallium/drivers/d3d12/d3d12_compiler.cpp b/src/gallium/drivers/d3d12/d3d12_compiler.cpp index 7f09dd76c3d..856cc319d89 100644 --- a/src/gallium/drivers/d3d12/d3d12_compiler.cpp +++ b/src/gallium/drivers/d3d12/d3d12_compiler.cpp @@ -1082,6 +1082,7 @@ select_shader_variant(struct d3d12_selection_context *sel_ctx, d3d12_shader_sele tex_options.saturate_s = key.tex_saturate_s; tex_options.saturate_r = key.tex_saturate_r; tex_options.saturate_t = key.tex_saturate_t; + tex_options.lower_invalid_implicit_lod = true; NIR_PASS_V(new_nir_variant, nir_lower_tex, &tex_options); } diff --git a/src/gallium/drivers/etnaviv/etnaviv_compiler_nir.c b/src/gallium/drivers/etnaviv/etnaviv_compiler_nir.c index cb150749fdc..bd6ef14ba40 100644 --- a/src/gallium/drivers/etnaviv/etnaviv_compiler_nir.c +++ b/src/gallium/drivers/etnaviv/etnaviv_compiler_nir.c @@ -1117,7 +1117,7 @@ etna_compile_shader(struct etna_shader_variant *v) NIR_PASS_V(s, nir_lower_regs_to_ssa); NIR_PASS_V(s, nir_lower_vars_to_ssa); NIR_PASS_V(s, nir_lower_indirect_derefs, nir_var_all, UINT32_MAX); - NIR_PASS_V(s, nir_lower_tex, &(struct nir_lower_tex_options) { .lower_txp = ~0u }); + NIR_PASS_V(s, nir_lower_tex, &(struct nir_lower_tex_options) { .lower_txp = ~0u, .lower_invalid_implicit_lod = true, }); if (v->key.has_sample_tex_compare) NIR_PASS_V(s, nir_lower_tex_shadow, v->key.num_texture_states, diff --git a/src/gallium/drivers/freedreno/a2xx/ir2_nir.c b/src/gallium/drivers/freedreno/a2xx/ir2_nir.c index 45fe0e26485..476631753e5 100644 --- a/src/gallium/drivers/freedreno/a2xx/ir2_nir.c +++ b/src/gallium/drivers/freedreno/a2xx/ir2_nir.c @@ -110,6 +110,7 @@ ir2_optimize_nir(nir_shader *s, bool lower) struct nir_lower_tex_options tex_options = { .lower_txp = ~0u, .lower_rect = 0, + .lower_invalid_implicit_lod = true, }; if (FD_DBG(DISASM)) { diff --git a/src/gallium/drivers/lima/lima_program.c b/src/gallium/drivers/lima/lima_program.c index 9f65b46d3ca..1154ec3cc95 100644 --- a/src/gallium/drivers/lima/lima_program.c +++ b/src/gallium/drivers/lima/lima_program.c @@ -287,6 +287,7 @@ lima_fs_compile_shader(struct lima_context *ctx, struct nir_lower_tex_options tex_options = { .swizzle_result = ~0u, + .lower_invalid_implicit_lod = true, }; for (int i = 0; i < ARRAY_SIZE(key->tex); i++) { diff --git a/src/gallium/drivers/lima/standalone/lima_compiler_cmdline.c b/src/gallium/drivers/lima/standalone/lima_compiler_cmdline.c index 5b63c731c79..f7ee352c377 100644 --- a/src/gallium/drivers/lima/standalone/lima_compiler_cmdline.c +++ b/src/gallium/drivers/lima/standalone/lima_compiler_cmdline.c @@ -214,6 +214,7 @@ main(int argc, char **argv) struct nir_lower_tex_options tex_options = { .lower_txp = ~0u, + .lower_invalid_implicit_lod = true, }; nir_shader *nir = load_glsl(1, filename, stage); diff --git a/src/gallium/drivers/r600/sfn/sfn_nir.cpp b/src/gallium/drivers/r600/sfn/sfn_nir.cpp index e79c42aab0b..98efdcb4c0b 100644 --- a/src/gallium/drivers/r600/sfn/sfn_nir.cpp +++ b/src/gallium/drivers/r600/sfn/sfn_nir.cpp @@ -836,6 +836,7 @@ int r600_shader_from_nir(struct r600_context *rctx, struct nir_lower_tex_options lower_tex_options = {0}; lower_tex_options.lower_txp = ~0u; lower_tex_options.lower_txf_offset = true; + lower_tex_options.lower_invalid_implicit_lod = true; NIR_PASS_V(sel->nir, nir_lower_tex, &lower_tex_options); NIR_PASS_V(sel->nir, r600::r600_nir_lower_txl_txf_array_or_cube); diff --git a/src/gallium/drivers/radeonsi/si_shader_nir.c b/src/gallium/drivers/radeonsi/si_shader_nir.c index 5c27d4a9e0f..71495b28763 100644 --- a/src/gallium/drivers/radeonsi/si_shader_nir.c +++ b/src/gallium/drivers/radeonsi/si_shader_nir.c @@ -234,6 +234,7 @@ static void si_lower_nir(struct si_screen *sscreen, struct nir_shader *nir) static const struct nir_lower_tex_options lower_tex_options = { .lower_txp = ~0u, .lower_txs_cube_array = true, + .lower_invalid_implicit_lod = true, }; NIR_PASS_V(nir, nir_lower_tex, &lower_tex_options); diff --git a/src/gallium/drivers/vc4/vc4_program.c b/src/gallium/drivers/vc4/vc4_program.c index 782127f5c33..86e7ba13722 100644 --- a/src/gallium/drivers/vc4/vc4_program.c +++ b/src/gallium/drivers/vc4/vc4_program.c @@ -2262,6 +2262,7 @@ vc4_shader_ntq(struct vc4_context *vc4, enum qstage stage, /* Apply swizzles to all samplers. */ .swizzle_result = ~0, + .lower_invalid_implicit_lod = true, }; /* Lower the format swizzle and ARB_texture_swizzle-style swizzle. diff --git a/src/gallium/drivers/zink/zink_compiler.c b/src/gallium/drivers/zink/zink_compiler.c index c5ea4a6bbb7..a32132b5a18 100644 --- a/src/gallium/drivers/zink/zink_compiler.c +++ b/src/gallium/drivers/zink/zink_compiler.c @@ -2184,7 +2184,9 @@ zink_shader_finalize(struct pipe_screen *pscreen, void *nirptr) struct zink_screen *screen = zink_screen(pscreen); nir_shader *nir = nirptr; - nir_lower_tex_options tex_opts = {0}; + nir_lower_tex_options tex_opts = { + .lower_invalid_implicit_lod = true, + }; /* Sampled Image must be an object whose type is OpTypeSampledImage. The Dim operand of the underlying OpTypeImage must be 1D, 2D, 3D, diff --git a/src/intel/compiler/brw_nir.c b/src/intel/compiler/brw_nir.c index f705e361070..81930286604 100644 --- a/src/intel/compiler/brw_nir.c +++ b/src/intel/compiler/brw_nir.c @@ -845,6 +845,7 @@ brw_preprocess_nir(const struct brw_compiler *compiler, nir_shader *nir, .lower_txs_lod = true, /* Wa_14012320009 */ .lower_offset_filter = devinfo->verx10 >= 125 ? lower_xehp_tg4_offset_filter : NULL, + .lower_invalid_implicit_lod = true, }; OPT(nir_lower_tex, &tex_options); @@ -1308,6 +1309,7 @@ brw_nir_apply_sampler_key(nir_shader *nir, nir_lower_tex_options tex_options = { .lower_txd_clamp_bindless_sampler = true, .lower_txd_clamp_if_sampler_index_not_lt_16 = true, + .lower_invalid_implicit_lod = true, }; /* Iron Lake and prior require lowering of all rectangle textures */ diff --git a/src/microsoft/spirv_to_dxil/spirv_to_dxil.c b/src/microsoft/spirv_to_dxil/spirv_to_dxil.c index 36a6e99f2f4..dccb2cd88d4 100644 --- a/src/microsoft/spirv_to_dxil/spirv_to_dxil.c +++ b/src/microsoft/spirv_to_dxil/spirv_to_dxil.c @@ -718,7 +718,9 @@ spirv_to_dxil(const uint32_t *words, size_t word_count, } NIR_PASS_V(nir, nir_lower_readonly_images_to_tex, true); - nir_lower_tex_options lower_tex_options = {0}; + nir_lower_tex_options lower_tex_options = { + .lower_invalid_implicit_lod = true, + }; NIR_PASS_V(nir, nir_lower_tex, &lower_tex_options); NIR_PASS_V(nir, dxil_spirv_nir_fix_sample_mask_type); diff --git a/src/panfrost/bifrost/bifrost_compile.c b/src/panfrost/bifrost/bifrost_compile.c index 833fc9715be..8c975fccc23 100644 --- a/src/panfrost/bifrost/bifrost_compile.c +++ b/src/panfrost/bifrost/bifrost_compile.c @@ -4066,6 +4066,7 @@ bi_optimize_nir(nir_shader *nir, unsigned gpu_id, bool is_blend) .lower_txp = ~0, .lower_tg4_broadcom_swizzle = true, .lower_txd = true, + .lower_invalid_implicit_lod = true, }; NIR_PASS(progress, nir, pan_nir_lower_64bit_intrin); diff --git a/src/panfrost/midgard/midgard_compile.c b/src/panfrost/midgard/midgard_compile.c index cfa003c7f69..7f4f0ab35c8 100644 --- a/src/panfrost/midgard/midgard_compile.c +++ b/src/panfrost/midgard/midgard_compile.c @@ -346,6 +346,7 @@ optimise_nir(nir_shader *nir, unsigned quirks, bool is_blend, bool is_blit) .lower_tg4_broadcom_swizzle = true, /* TODO: we have native gradient.. */ .lower_txd = true, + .lower_invalid_implicit_lod = true, }; NIR_PASS(progress, nir, nir_lower_tex, &lower_tex_options);