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freedreno/ir3: make texture instruction construction more dynamic
This will make life a lot easier as we add support for additional instructions. v2: shadow reference value is always .z or .w Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu> Signed-off-by: Rob Clark <robclark@freedesktop.org>
This commit is contained in:
Ilia Mirkin
Rob Clark
parent
df341320c9
commit
53678f5e6b
1 changed files with 81 additions and 146 deletions
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@ -1077,149 +1077,91 @@ trans_arl(const struct instr_translater *t,
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struct tex_info {
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int8_t order[4];
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int8_t args;
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unsigned src_wrmask, flags;
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};
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static const struct tex_info *
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get_tex_info(struct ir3_compile_context *ctx,
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struct tgsi_full_instruction *inst)
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{
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static const struct tex_info tex1d = {
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.order = { 0, -1, -1, -1 }, /* coord.x */
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.src_wrmask = TGSI_WRITEMASK_XY,
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.flags = 0,
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};
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static const struct tex_info tex1ds = {
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.order = { 0, -1, 2, -1 }, /* coord.xz */
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.src_wrmask = TGSI_WRITEMASK_XYZ,
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.flags = IR3_INSTR_S,
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};
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static const struct tex_info tex1da = {
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.order = { 0, -1, 1, -1 }, /* coord.xy */
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.src_wrmask = TGSI_WRITEMASK_XYZ,
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.flags = IR3_INSTR_A,
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};
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static const struct tex_info tex1dsa = {
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.order = { 0, -1, 1, 2 }, /* coord.xyz */
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.src_wrmask = TGSI_WRITEMASK_XYZW,
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.flags = IR3_INSTR_S | IR3_INSTR_A,
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};
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static const struct tex_info tex2d = {
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.order = { 0, 1, -1, -1 }, /* coord.xy */
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.src_wrmask = TGSI_WRITEMASK_XY,
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.flags = 0,
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};
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static const struct tex_info tex2ds = {
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.order = { 0, 1, 2, -1 }, /* coord.xyz */
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.src_wrmask = TGSI_WRITEMASK_XYZ,
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.flags = IR3_INSTR_S,
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};
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static const struct tex_info tex2da = {
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.order = { 0, 1, 2, -1 }, /* coord.xyz */
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.src_wrmask = TGSI_WRITEMASK_XYZ,
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.flags = IR3_INSTR_A,
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};
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static const struct tex_info tex2dsa = {
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.order = { 0, 1, 2, 3 }, /* coord.xyzw */
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.src_wrmask = TGSI_WRITEMASK_XYZW,
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.flags = IR3_INSTR_S | IR3_INSTR_A,
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};
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static const struct tex_info tex3d = {
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.order = { 0, 1, 2, -1 }, /* coord.xyz */
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.src_wrmask = TGSI_WRITEMASK_XYZ,
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.flags = IR3_INSTR_3D,
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};
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static const struct tex_info tex3ds = {
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.order = { 0, 1, 2, 3 }, /* coord.xyzw */
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.src_wrmask = TGSI_WRITEMASK_XYZW,
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.flags = IR3_INSTR_S | IR3_INSTR_3D,
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};
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static const struct tex_info txp1d = {
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.order = { 0, -1, 3, -1 }, /* coord.xw */
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.src_wrmask = TGSI_WRITEMASK_XYZ,
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.flags = IR3_INSTR_P,
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};
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static const struct tex_info txp1ds = {
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.order = { 0, -1, 2, 3 }, /* coord.xyz */
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.src_wrmask = TGSI_WRITEMASK_XYZW,
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.flags = IR3_INSTR_P | IR3_INSTR_S,
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};
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static const struct tex_info txp2d = {
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.order = { 0, 1, 3, -1 }, /* coord.xyw */
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.src_wrmask = TGSI_WRITEMASK_XYZ,
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.flags = IR3_INSTR_P,
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};
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static const struct tex_info txp2ds = {
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.order = { 0, 1, 2, 3 }, /* coord.xyzw */
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.src_wrmask = TGSI_WRITEMASK_XYZW,
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.flags = IR3_INSTR_P | IR3_INSTR_S,
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};
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static const struct tex_info txp3d = {
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.order = { 0, 1, 2, 3 }, /* coord.xyzw */
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.src_wrmask = TGSI_WRITEMASK_XYZW,
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.flags = IR3_INSTR_P | IR3_INSTR_3D,
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};
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struct target_info {
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uint8_t dims;
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uint8_t cube;
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uint8_t array;
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uint8_t shadow;
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};
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unsigned tex = inst->Texture.Texture;
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static const struct target_info tex_targets[] = {
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[TGSI_TEXTURE_1D] = { 1, 0, 0, 0 },
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[TGSI_TEXTURE_2D] = { 2, 0, 0, 0 },
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[TGSI_TEXTURE_3D] = { 3, 0, 0, 0 },
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[TGSI_TEXTURE_CUBE] = { 3, 1, 0, 0 },
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[TGSI_TEXTURE_RECT] = { 2, 0, 0, 0 },
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[TGSI_TEXTURE_SHADOW1D] = { 1, 0, 0, 1 },
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[TGSI_TEXTURE_SHADOW2D] = { 2, 0, 0, 1 },
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[TGSI_TEXTURE_SHADOWRECT] = { 2, 0, 0, 1 },
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[TGSI_TEXTURE_1D_ARRAY] = { 1, 0, 1, 0 },
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[TGSI_TEXTURE_2D_ARRAY] = { 2, 0, 1, 0 },
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[TGSI_TEXTURE_SHADOW1D_ARRAY] = { 1, 0, 1, 1 },
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[TGSI_TEXTURE_SHADOW2D_ARRAY] = { 2, 0, 1, 1 },
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[TGSI_TEXTURE_SHADOWCUBE] = { 3, 1, 0, 1 },
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[TGSI_TEXTURE_2D_MSAA] = { 2, 0, 0, 0 },
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[TGSI_TEXTURE_2D_ARRAY_MSAA] = { 2, 0, 1, 0 },
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[TGSI_TEXTURE_CUBE_ARRAY] = { 3, 1, 1, 0 },
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[TGSI_TEXTURE_SHADOWCUBE_ARRAY] = { 3, 1, 1, 1 },
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};
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static void
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fill_tex_info(struct ir3_compile_context *ctx,
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struct tgsi_full_instruction *inst,
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struct tex_info *info)
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{
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const struct target_info *tgt = &tex_targets[inst->Texture.Texture];
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if (tgt->dims == 3)
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info->flags |= IR3_INSTR_3D;
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if (tgt->array)
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info->flags |= IR3_INSTR_A;
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if (tgt->shadow)
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info->flags |= IR3_INSTR_S;
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switch (inst->Instruction.Opcode) {
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case TGSI_OPCODE_TEX:
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case TGSI_OPCODE_TXB:
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case TGSI_OPCODE_TXL:
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switch (tex) {
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case TGSI_TEXTURE_1D:
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return &tex1d;
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case TGSI_TEXTURE_SHADOW1D:
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return &tex1ds;
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case TGSI_TEXTURE_1D_ARRAY:
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return &tex1da;
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case TGSI_TEXTURE_SHADOW1D_ARRAY:
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return &tex1dsa;
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case TGSI_TEXTURE_2D:
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case TGSI_TEXTURE_RECT:
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return &tex2d;
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case TGSI_TEXTURE_SHADOW2D:
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case TGSI_TEXTURE_SHADOWRECT:
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return &tex2ds;
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case TGSI_TEXTURE_2D_ARRAY:
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return &tex2da;
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case TGSI_TEXTURE_SHADOW2D_ARRAY:
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return &tex2dsa;
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case TGSI_TEXTURE_3D:
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case TGSI_TEXTURE_CUBE:
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return &tex3d;
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case TGSI_TEXTURE_SHADOWCUBE:
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return &tex3ds;
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default:
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compile_error(ctx, "unknown texture type: %s\n",
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tgsi_texture_names[tex]);
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return NULL;
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}
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info->args = 2;
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break;
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case TGSI_OPCODE_TXP:
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switch (tex) {
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case TGSI_TEXTURE_1D:
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return &txp1d;
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case TGSI_TEXTURE_SHADOW1D:
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return &txp1ds;
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case TGSI_TEXTURE_2D:
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case TGSI_TEXTURE_RECT:
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return &txp2d;
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case TGSI_TEXTURE_SHADOW2D:
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case TGSI_TEXTURE_SHADOWRECT:
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return &txp2ds;
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case TGSI_TEXTURE_3D:
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case TGSI_TEXTURE_CUBE:
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return &txp3d;
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default:
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compile_error(ctx, "unknown texture type: %s\n",
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tgsi_texture_names[tex]);
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break;
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}
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info->flags |= IR3_INSTR_P;
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/* fallthrough */
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case TGSI_OPCODE_TEX:
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info->args = 1;
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break;
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}
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compile_assert(ctx, 0);
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return NULL;
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/*
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* lay out the first argument in the proper order:
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* - actual coordinates first
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* - array index
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* - shadow reference
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* - projection w
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*
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* bias/lod go into the second arg
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*/
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int arg, pos = 0;
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for (arg = 0; arg < tgt->dims; arg++)
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info->order[arg] = pos++;
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if (tgt->dims == 1)
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info->order[pos++] = -1;
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if (tgt->array)
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info->order[pos++] = arg++;
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if (tgt->shadow)
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info->order[pos++] = MAX2(arg, 2);
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if (info->flags & IR3_INSTR_P)
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info->order[pos++] = 3;
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info->src_wrmask = (1 << pos) - 1;
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for (; pos < 4; pos++)
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info->order[pos] = -1;
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assert(pos <= 4);
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}
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static bool check_swiz(struct tgsi_src_register *src, const int8_t order[4])
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@ -1233,15 +1175,7 @@ static bool check_swiz(struct tgsi_src_register *src, const int8_t order[4])
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static bool is_1d(unsigned tex)
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{
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switch (tex) {
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case TGSI_TEXTURE_1D:
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case TGSI_TEXTURE_SHADOW1D:
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case TGSI_TEXTURE_1D_ARRAY:
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case TGSI_TEXTURE_SHADOW1D_ARRAY:
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return true;
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default:
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return false;
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}
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return tex_targets[tex].dims == 1;
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}
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static struct tgsi_src_register *
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@ -1316,21 +1250,22 @@ trans_samp(const struct instr_translater *t,
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struct tgsi_dst_register *dst = &inst->Dst[0].Register;
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struct tgsi_src_register *coord;
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struct tgsi_src_register *samp = &inst->Src[1].Register;
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const struct tex_info *tinf;
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struct tex_info tinf;
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tinf = get_tex_info(ctx, inst);
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coord = get_tex_coord(ctx, inst, tinf);
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memset(&tinf, 0, sizeof(tinf));
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fill_tex_info(ctx, inst, &tinf);
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coord = get_tex_coord(ctx, inst, &tinf);
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instr = instr_create(ctx, 5, t->opc);
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instr->cat5.type = get_ftype(ctx);
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instr->cat5.samp = samp->Index;
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instr->cat5.tex = samp->Index;
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instr->flags |= tinf->flags;
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instr->flags |= tinf.flags;
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add_dst_reg_wrmask(ctx, instr, dst, 0, dst->WriteMask);
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add_src_reg_wrmask(ctx, instr, coord, coord->SwizzleX, tinf->src_wrmask);
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add_src_reg_wrmask(ctx, instr, coord, coord->SwizzleX, tinf.src_wrmask);
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if (t->opc != OPC_SAM)
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if (tinf.args > 1)
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add_src_reg_wrmask(ctx, instr, coord, coord->SwizzleW, 0x1);
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}
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