From 52e91f7640dc0858f0dc7be096ced554ffffba2f Mon Sep 17 00:00:00 2001 From: Samuel Pitoiset Date: Fri, 1 Oct 2021 09:56:44 +0200 Subject: [PATCH] radv: move ngg passthrough determination earlier MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Signed-off-by: Samuel Pitoiset Reviewed-by: Timur Kristóf Part-of: --- src/amd/common/ac_nir.h | 3 +-- src/amd/common/ac_nir_lower_ngg.c | 7 ++----- src/amd/vulkan/radv_pipeline.c | 5 +++++ src/amd/vulkan/radv_shader.c | 2 -- 4 files changed, 8 insertions(+), 9 deletions(-) diff --git a/src/amd/common/ac_nir.h b/src/amd/common/ac_nir.h index 0bcfbc15682..69ff90472ae 100644 --- a/src/amd/common/ac_nir.h +++ b/src/amd/common/ac_nir.h @@ -93,7 +93,6 @@ ac_nir_lower_indirect_derefs(nir_shader *shader, typedef struct { - bool passthrough; uint64_t nggc_inputs_read_by_pos; uint64_t nggc_inputs_read_by_others; } ac_nir_ngg_config; @@ -106,7 +105,7 @@ ac_nir_lower_ngg_nogs(nir_shader *shader, unsigned wave_size, bool can_cull, bool early_prim_export, - bool consider_passthrough, + bool passthrough, bool export_prim_id, bool provoking_vtx_last, bool use_edgeflags, diff --git a/src/amd/common/ac_nir_lower_ngg.c b/src/amd/common/ac_nir_lower_ngg.c index ccf4de29afa..994aa42ecab 100644 --- a/src/amd/common/ac_nir_lower_ngg.c +++ b/src/amd/common/ac_nir_lower_ngg.c @@ -1262,7 +1262,7 @@ ac_nir_lower_ngg_nogs(nir_shader *shader, unsigned wave_size, bool can_cull, bool early_prim_export, - bool consider_passthrough, + bool passthrough, bool export_prim_id, bool provoking_vtx_last, bool use_edgeflags, @@ -1271,9 +1271,7 @@ ac_nir_lower_ngg_nogs(nir_shader *shader, nir_function_impl *impl = nir_shader_get_entrypoint(shader); assert(impl); assert(max_num_es_vertices && max_workgroup_size && wave_size); - - bool passthrough = consider_passthrough && !can_cull && - !(shader->info.stage == MESA_SHADER_VERTEX && export_prim_id); + assert(!(can_cull && passthrough)); nir_variable *position_value_var = nir_local_variable_create(impl, glsl_vec4_type(), "position_value"); nir_variable *prim_exp_arg_var = nir_local_variable_create(impl, glsl_uint_type(), "prim_exp_arg"); @@ -1415,7 +1413,6 @@ ac_nir_lower_ngg_nogs(nir_shader *shader, shader->info.shared_size = state.total_lds_bytes; ac_nir_ngg_config ret = { - .passthrough = passthrough, .nggc_inputs_read_by_pos = state.inputs_needed_by_pos, .nggc_inputs_read_by_others = state.inputs_needed_by_others, }; diff --git a/src/amd/vulkan/radv_pipeline.c b/src/amd/vulkan/radv_pipeline.c index 3d5a800429e..89337d531fc 100644 --- a/src/amd/vulkan/radv_pipeline.c +++ b/src/amd/vulkan/radv_pipeline.c @@ -2798,6 +2798,11 @@ radv_determine_ngg_settings(struct radv_pipeline *pipeline, infos[es_stage].num_lds_blocks_when_not_culling = DIV_ROUND_UP(lds_bytes_if_culling_off, device->physical_device->rad_info.lds_encode_granularity); + + infos[es_stage].is_ngg_passthrough = infos[es_stage].is_ngg_passthrough && + !infos[es_stage].has_ngg_culling && + !(es_stage == MESA_SHADER_VERTEX && + infos[es_stage].vs.outinfo.export_prim_id); } } diff --git a/src/amd/vulkan/radv_shader.c b/src/amd/vulkan/radv_shader.c index 93b88f8f0cc..5cc6c302aaf 100644 --- a/src/amd/vulkan/radv_shader.c +++ b/src/amd/vulkan/radv_shader.c @@ -1014,8 +1014,6 @@ void radv_lower_ngg(struct radv_device *device, struct nir_shader *nir, pl_key->vs.provoking_vtx_last, false, pl_key->vs.instance_rate_inputs); - - info->is_ngg_passthrough = out_conf.passthrough; } else if (nir->info.stage == MESA_SHADER_GEOMETRY) { assert(info->is_ngg); ac_nir_lower_ngg_gs(