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dri: add a way to request that modes have matching color/zs depths

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Some GPUs, notably nv3x/nv4x can't render to mismatched color/zs
framebuffer depths. Fallbacks can be done by the driver, with shadow
surfaces, but no reason to encourage applications to select non-matching
glx visuals.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
This commit is contained in:
Ilia Mirkin 2016-08-20 16:10:20 -04:00
parent 092f994a03
commit 528390021f
8 changed files with 29 additions and 14 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

4
src/gallium/state_trackers/dri/dri_screen.c
View file

@ -214,7 +214,7 @@ dri_fill_in_modes(struct dri_screen *screen)
depth_buffer_factor, back_buffer_modes,
ARRAY_SIZE(back_buffer_modes),
msaa_modes, 1,
GL_TRUE);
GL_TRUE, GL_FALSE);
configs = driConcatConfigs(configs, new_configs);
/* Multi-sample configs without an accumulation buffer. */
@ -224,7 +224,7 @@ dri_fill_in_modes(struct dri_screen *screen)
depth_buffer_factor, back_buffer_modes,
ARRAY_SIZE(back_buffer_modes),
msaa_modes+1, num_msaa_modes-1,
GL_FALSE);
GL_FALSE, GL_FALSE);
configs = driConcatConfigs(configs, new_configs);
}
}

21
src/mesa/drivers/dri/common/utils.c
View file

@ -143,8 +143,10 @@ driGetRendererString( char * buffer, const char * hardware_name,
* \param msaa_samples Array of msaa sample count. 0 represents a visual
* without a multisample buffer.
* \param num_msaa_modes Number of entries in \c msaa_samples.
* \param visType GLX visual type. Usually either \c GLX_TRUE_COLOR or
* \c GLX_DIRECT_COLOR.
* \param enable_accum Add an accum buffer to the configs
* \param color_depth_match Whether the color depth must match the zs depth
* This forces 32-bit color to have 24-bit depth, and
* 16-bit color to have 16-bit depth.
*
* \returns
* Pointer to any array of pointers to the \c __DRIconfig structures created
@ -158,7 +160,7 @@ driCreateConfigs(mesa_format format,
unsigned num_depth_stencil_bits,
const GLenum * db_modes, unsigned num_db_modes,
const uint8_t * msaa_samples, unsigned num_msaa_modes,
GLboolean enable_accum)
GLboolean enable_accum, GLboolean color_depth_match)
{
static const uint32_t masks_table[][4] = {
/* MESA_FORMAT_B5G6R5_UNORM */
@ -236,6 +238,19 @@ driCreateConfigs(mesa_format format,
for ( i = 0 ; i < num_db_modes ; i++ ) {
for ( h = 0 ; h < num_msaa_modes; h++ ) {
for ( j = 0 ; j < num_accum_bits ; j++ ) {
if (color_depth_match &&
(depth_bits[k] || stencil_bits[k])) {
/* Depth can really only be 0, 16, 24, or 32. A 32-bit
* color format still matches 24-bit depth, as there
* is an implicit 8-bit stencil. So really we just
* need to make sure that color/depth are both 16 or
* both non-16.
*/
if ((depth_bits[k] + stencil_bits[k] == 16) !=
(red_bits + green_bits + blue_bits + alpha_bits == 16))
continue;
}
*c = malloc (sizeof **c);
modes = &(*c)->modes;
c++;

2
src/mesa/drivers/dri/common/utils.h
View file

@ -45,7 +45,7 @@ driCreateConfigs(mesa_format format,
unsigned num_depth_stencil_bits,
const GLenum * db_modes, unsigned num_db_modes,
const uint8_t * msaa_samples, unsigned num_msaa_modes,
GLboolean enable_accum);
GLboolean enable_accum, GLboolean color_depth_match);
__DRIconfig **driConcatConfigs(__DRIconfig **a,
__DRIconfig **b);

4
src/mesa/drivers/dri/i915/intel_screen.c
View file

@ -1081,7 +1081,7 @@ intel_screen_make_configs(__DRIscreen *dri_screen)
num_depth_stencil_bits,
back_buffer_modes, 2,
singlesample_samples, 1,
false);
false, false);
configs = driConcatConfigs(configs, new_configs);
}
@ -1103,7 +1103,7 @@ intel_screen_make_configs(__DRIscreen *dri_screen)
depth_bits, stencil_bits, 1,
back_buffer_modes, 1,
singlesample_samples, 1,
true);
true, false);
configs = driConcatConfigs(configs, new_configs);
}

6
src/mesa/drivers/dri/i965/intel_screen.c
View file

@ -1328,7 +1328,7 @@ intel_screen_make_configs(__DRIscreen *dri_screen)
num_depth_stencil_bits,
back_buffer_modes, 2,
singlesample_samples, 1,
false);
false, false);
configs = driConcatConfigs(configs, new_configs);
}
@ -1350,7 +1350,7 @@ intel_screen_make_configs(__DRIscreen *dri_screen)
depth_bits, stencil_bits, 1,
back_buffer_modes, 1,
singlesample_samples, 1,
true);
true, false);
configs = driConcatConfigs(configs, new_configs);
}
@ -1398,7 +1398,7 @@ intel_screen_make_configs(__DRIscreen *dri_screen)
back_buffer_modes, 1,
multisample_samples,
num_msaa_modes,
false);
false, false);
configs = driConcatConfigs(configs, new_configs);
}

2
src/mesa/drivers/dri/nouveau/nouveau_screen.c
View file

@ -78,7 +78,7 @@ nouveau_get_configs(void)
ARRAY_SIZE(back_buffer_modes),
msaa_samples,
ARRAY_SIZE(msaa_samples),
GL_TRUE);
GL_TRUE, GL_FALSE);
assert(config);
configs = driConcatConfigs(configs, config);

2
src/mesa/drivers/dri/radeon/radeon_screen.c
View file

@ -813,7 +813,7 @@ __DRIconfig **radeonInitScreen2(__DRIscreen *psp)
ARRAY_SIZE(back_buffer_modes),
msaa_samples_array,
ARRAY_SIZE(msaa_samples_array),
GL_TRUE);
GL_TRUE, GL_FALSE);
configs = driConcatConfigs(configs, new_configs);
}

2
src/mesa/drivers/dri/swrast/swrast.c
View file

@ -273,7 +273,7 @@ swrastFillInModes(__DRIscreen *psp,
depth_bits_array, stencil_bits_array,
depth_buffer_factor, back_buffer_modes,
back_buffer_factor, msaa_samples_array, 1,
GL_TRUE);
GL_TRUE, GL_FALSE);
if (configs == NULL) {
fprintf(stderr, "[%s:%u] Error creating FBConfig!\n", __func__,
__LINE__);