From 527cbf088e85bb18260556a71c55321e87bed317 Mon Sep 17 00:00:00 2001 From: Jonas Kulla Date: Mon, 19 Jun 2017 19:46:23 +0200 Subject: [PATCH] anv: Fix L3 cache programming on Bay Trail Valid values for URBAllocation start at 32, so substract that before programming the register. This was missed when porting from the GL driver. Cc: "17.1" Reviewed-by: Francisco Jerez Reviewed-by: Jason Ekstrand (cherry picked from commit a52ee32a9a49b48c51a80b8a35aa26bd583cabb7) --- src/intel/vulkan/genX_cmd_buffer.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/intel/vulkan/genX_cmd_buffer.c b/src/intel/vulkan/genX_cmd_buffer.c index 4531c75caef..697bc52ac45 100644 --- a/src/intel/vulkan/genX_cmd_buffer.c +++ b/src/intel/vulkan/genX_cmd_buffer.c @@ -822,7 +822,7 @@ genX(cmd_buffer_config_l3)(struct anv_cmd_buffer *cmd_buffer, anv_pack_struct(&l3cr2, GENX(L3CNTLREG2), .SLMEnable = has_slm, .URBLowBandwidth = urb_low_bw, - .URBAllocation = cfg->n[GEN_L3P_URB], + .URBAllocation = cfg->n[GEN_L3P_URB] - n0_urb, #if !GEN_IS_HASWELL .ALLAllocation = cfg->n[GEN_L3P_ALL], #endif