diff --git a/src/gallium/drivers/iris/iris_batch.c b/src/gallium/drivers/iris/iris_batch.c
index ee73bfa934b..ad46fab5eb3 100644
--- a/src/gallium/drivers/iris/iris_batch.c
+++ b/src/gallium/drivers/iris/iris_batch.c
@@ -239,7 +239,7 @@ iris_init_batch(struct iris_context *ice,
       batch->decoder.surface_base = IRIS_MEMZONE_BINDER_START;
       batch->decoder.max_vbo_decoded_lines = 32;
       if (batch->name == IRIS_BATCH_BLITTER)
-         batch->decoder.engine = I915_ENGINE_CLASS_COPY;
+         batch->decoder.engine = INTEL_ENGINE_CLASS_COPY;
    }
 
    iris_init_batch_measure(ice, batch);
diff --git a/src/intel/common/intel_gem.c b/src/intel/common/intel_gem.c
index 415479608cd..4ca2e454aca 100644
--- a/src/intel/common/intel_gem.c
+++ b/src/intel/common/intel_gem.c
@@ -68,7 +68,7 @@ intel_gem_create_context_engines(int fd,
    I915_DEFINE_CONTEXT_PARAM_ENGINES(engines_param, 64);
    engines_param.extensions = 0;
 
-   /* For each type of drm_i915_gem_engine_class of interest, we keep track of
+   /* For each type of intel_engine_class of interest, we keep track of
     * the previous engine instance used.
     */
    int last_engine_idx[] = {
diff --git a/src/intel/dev/intel_device_info.c b/src/intel/dev/intel_device_info.c
index 0843faa2318..e6c32695512 100644
--- a/src/intel/dev/intel_device_info.c
+++ b/src/intel/dev/intel_device_info.c
@@ -1921,16 +1921,16 @@ init_max_scratch_ids(struct intel_device_info *devinfo)
 
 static unsigned
 intel_device_info_calc_engine_prefetch(const struct intel_device_info *devinfo,
-                                       enum drm_i915_gem_engine_class engine_class)
+                                       enum intel_engine_class engine_class)
 {
    if (devinfo->verx10 < 125)
       return 512;
 
    if (intel_device_info_is_mtl(devinfo)) {
       switch (engine_class) {
-      case I915_ENGINE_CLASS_RENDER:
+      case INTEL_ENGINE_CLASS_RENDER:
          return 2048;
-      case I915_ENGINE_CLASS_COMPUTE:
+      case INTEL_ENGINE_CLASS_COMPUTE:
          return 1024;
       default:
          return 512;
@@ -2063,7 +2063,7 @@ intel_get_device_info_from_fd(int fd, struct intel_device_info *devinfo)
 
    init_max_scratch_ids(devinfo);
 
-   for (enum drm_i915_gem_engine_class engine = I915_ENGINE_CLASS_RENDER;
+   for (enum intel_engine_class engine = INTEL_ENGINE_CLASS_RENDER;
         engine < ARRAY_SIZE(devinfo->engine_class_prefetch); engine++)
       devinfo->engine_class_prefetch[engine] =
             intel_device_info_calc_engine_prefetch(devinfo, engine);
diff --git a/src/intel/dev/intel_device_info.h b/src/intel/dev/intel_device_info.h
index 74047fb1249..6bb3868bdce 100644
--- a/src/intel/dev/intel_device_info.h
+++ b/src/intel/dev/intel_device_info.h
@@ -28,17 +28,15 @@
 #include <stdbool.h>
 #include <stdint.h>
 
-#include "drm-uapi/i915_drm.h"
-
 #include "util/macros.h"
 #include "compiler/shader_enums.h"
 
+#include "intel/common/intel_engine.h"
+
 #ifdef __cplusplus
 extern "C" {
 #endif
 
-struct drm_i915_query_topology_info;
-
 #define INTEL_DEVICE_MAX_NAME_SIZE        64
 #define INTEL_DEVICE_MAX_SLICES           8
 #define INTEL_DEVICE_MAX_SUBSLICES        (8)  /* Maximum on gfx11 */
@@ -351,7 +349,7 @@ struct intel_device_info
     * Size of the command streamer prefetch. This is important to know for
     * self modifying batches.
     */
-   unsigned engine_class_prefetch[I915_ENGINE_CLASS_COMPUTE + 1];
+   unsigned engine_class_prefetch[INTEL_ENGINE_CLASS_COMPUTE + 1];
 
    /**
     * For the longest time the timestamp frequency for Gen's timestamp counter
diff --git a/src/intel/dev/intel_device_info_override_test.c b/src/intel/dev/intel_device_info_override_test.c
index e6b2b28c1aa..2edfcef5469 100644
--- a/src/intel/dev/intel_device_info_override_test.c
+++ b/src/intel/dev/intel_device_info_override_test.c
@@ -71,7 +71,7 @@ main(int argc, char *argv[])
       fprintf(stderr, "%u\n", devinfo.verx10);
       assert(devinfo.verx10 == verx10);
       verify_device_info(&devinfo);
-      assert(devinfo.engine_class_prefetch[I915_ENGINE_CLASS_RENDER] > 0);
+      assert(devinfo.engine_class_prefetch[INTEL_ENGINE_CLASS_RENDER] > 0);
    }
 
    return 0;
diff --git a/src/intel/vulkan/anv_batch_chain.c b/src/intel/vulkan/anv_batch_chain.c
index 111a4dc3495..15de9a8678f 100644
--- a/src/intel/vulkan/anv_batch_chain.c
+++ b/src/intel/vulkan/anv_batch_chain.c
@@ -936,7 +936,7 @@ anv_cmd_buffer_end_batch_buffer(struct anv_cmd_buffer *cmd_buffer)
           */
          if (cmd_buffer->batch_bos.next == cmd_buffer->batch_bos.prev) {
             const struct intel_device_info *devinfo = cmd_buffer->device->info;
-            const enum drm_i915_gem_engine_class engine_class = cmd_buffer->queue_family->engine_class;
+            const enum intel_engine_class engine_class = cmd_buffer->queue_family->engine_class;
             /* Careful to have everything in signed integer. */
             int32_t prefetch_len = devinfo->engine_class_prefetch[engine_class];
             int32_t batch_len = cmd_buffer->batch.next - cmd_buffer->batch.start;
diff --git a/src/intel/vulkan/anv_device.c b/src/intel/vulkan/anv_device.c
index c8ad47703d7..deacac5cd83 100644
--- a/src/intel/vulkan/anv_device.c
+++ b/src/intel/vulkan/anv_device.c
@@ -687,7 +687,7 @@ anv_physical_device_init_queue_families(struct anv_physical_device *pdevice)
       if (env_var_as_boolean("INTEL_COMPUTE_CLASS", false))
          c_count = intel_engines_count(pdevice->engine_info,
                                        INTEL_ENGINE_CLASS_COMPUTE);
-      enum drm_i915_gem_engine_class compute_class =
+      enum intel_engine_class compute_class =
          c_count < 1 ? INTEL_ENGINE_CLASS_RENDER : INTEL_ENGINE_CLASS_COMPUTE;
 
       anv_override_engine_counts(&gc_count, &g_count, &c_count);
diff --git a/src/intel/vulkan/genX_query.c b/src/intel/vulkan/genX_query.c
index e36b5ccd212..f851d61d21f 100644
--- a/src/intel/vulkan/genX_query.c
+++ b/src/intel/vulkan/genX_query.c
@@ -1014,7 +1014,7 @@ void genX(CmdBeginQueryIndexedEXT)(
       assert(reloc_idx == pdevice->n_perf_query_commands);
 
       const struct intel_device_info *devinfo = cmd_buffer->device->info;
-      const enum drm_i915_gem_engine_class engine_class = cmd_buffer->queue_family->engine_class;
+      const enum intel_engine_class engine_class = cmd_buffer->queue_family->engine_class;
       mi_self_mod_barrier(&b, devinfo->engine_class_prefetch[engine_class]);
 
       anv_batch_emit(&cmd_buffer->batch, GENX(PIPE_CONTROL), pc) {
diff --git a/src/intel/vulkan_hasvk/anv_batch_chain.c b/src/intel/vulkan_hasvk/anv_batch_chain.c
index 89a29f55dac..ba87b2461a5 100644
--- a/src/intel/vulkan_hasvk/anv_batch_chain.c
+++ b/src/intel/vulkan_hasvk/anv_batch_chain.c
@@ -1019,7 +1019,7 @@ anv_cmd_buffer_end_batch_buffer(struct anv_cmd_buffer *cmd_buffer)
           */
          if (cmd_buffer->batch_bos.next == cmd_buffer->batch_bos.prev) {
             const struct intel_device_info *devinfo = cmd_buffer->device->info;
-            const enum drm_i915_gem_engine_class engine_class = cmd_buffer->queue_family->engine_class;
+            const enum intel_engine_class engine_class = cmd_buffer->queue_family->engine_class;
             /* Careful to have everything in signed integer. */
             int32_t prefetch_len = devinfo->engine_class_prefetch[engine_class];
             int batch_len = cmd_buffer->batch.next - cmd_buffer->batch.start;
diff --git a/src/intel/vulkan_hasvk/anv_device.c b/src/intel/vulkan_hasvk/anv_device.c
index 8e370f4d03a..3708013c8c1 100644
--- a/src/intel/vulkan_hasvk/anv_device.c
+++ b/src/intel/vulkan_hasvk/anv_device.c
@@ -696,7 +696,7 @@ anv_physical_device_init_queue_families(struct anv_physical_device *pdevice)
             .queueFlags = VK_QUEUE_GRAPHICS_BIT |
                           VK_QUEUE_TRANSFER_BIT,
             .queueCount = g_count,
-            .engine_class = I915_ENGINE_CLASS_RENDER,
+            .engine_class = INTEL_ENGINE_CLASS_RENDER,
          };
       }
       if (c_count > 0) {
@@ -704,7 +704,7 @@ anv_physical_device_init_queue_families(struct anv_physical_device *pdevice)
             .queueFlags = VK_QUEUE_COMPUTE_BIT |
                           VK_QUEUE_TRANSFER_BIT,
             .queueCount = c_count,
-            .engine_class = I915_ENGINE_CLASS_RENDER,
+            .engine_class = INTEL_ENGINE_CLASS_RENDER,
          };
       }
       /* Increase count below when other families are added as a reminder to
@@ -718,7 +718,7 @@ anv_physical_device_init_queue_families(struct anv_physical_device *pdevice)
                        VK_QUEUE_COMPUTE_BIT |
                        VK_QUEUE_TRANSFER_BIT,
          .queueCount = 1,
-         .engine_class = I915_ENGINE_CLASS_RENDER,
+         .engine_class = INTEL_ENGINE_CLASS_RENDER,
       };
       family_count = 1;
    }
diff --git a/src/intel/vulkan_hasvk/anv_perf.c b/src/intel/vulkan_hasvk/anv_perf.c
index 36c4c30e381..3aac07fd72a 100644
--- a/src/intel/vulkan_hasvk/anv_perf.c
+++ b/src/intel/vulkan_hasvk/anv_perf.c
@@ -353,7 +353,7 @@ VkResult anv_EnumeratePhysicalDeviceQueueFamilyPerformanceQueryCountersKHR(
     */
    struct anv_queue_family *queue_family =
       &pdevice->queue.families[queueFamilyIndex];
-   if (queue_family->engine_class != I915_ENGINE_CLASS_RENDER)
+   if (queue_family->engine_class != INTEL_ENGINE_CLASS_RENDER)
       return vk_outarray_status(&out);
 
    for (int c = 0; c < (perf ? perf->n_counters : 0); c++) {
diff --git a/src/intel/vulkan_hasvk/anv_private.h b/src/intel/vulkan_hasvk/anv_private.h
index 407fbe8b7b1..2405d6944d4 100644
--- a/src/intel/vulkan_hasvk/anv_private.h
+++ b/src/intel/vulkan_hasvk/anv_private.h
@@ -927,7 +927,7 @@ struct anv_queue_family {
    uint32_t       queueCount;
 
    /* Driver internal information */
-   enum drm_i915_gem_engine_class engine_class;
+   enum intel_engine_class engine_class;
 };
 
 #define ANV_MAX_QUEUE_FAMILIES 3
diff --git a/src/intel/vulkan_hasvk/anv_utrace.c b/src/intel/vulkan_hasvk/anv_utrace.c
index 965be744411..195e151dabb 100644
--- a/src/intel/vulkan_hasvk/anv_utrace.c
+++ b/src/intel/vulkan_hasvk/anv_utrace.c
@@ -267,13 +267,13 @@ static const char *
 queue_family_to_name(const struct anv_queue_family *family)
 {
    switch (family->engine_class) {
-   case I915_ENGINE_CLASS_RENDER:
+   case INTEL_ENGINE_CLASS_RENDER:
       return "render";
-   case I915_ENGINE_CLASS_COPY:
+   case INTEL_ENGINE_CLASS_COPY:
       return "copy";
-   case I915_ENGINE_CLASS_VIDEO:
+   case INTEL_ENGINE_CLASS_VIDEO:
       return "video";
-   case I915_ENGINE_CLASS_VIDEO_ENHANCE:
+   case INTEL_ENGINE_CLASS_VIDEO_ENHANCE:
       return "video-enh";
    default:
       return "unknown";
diff --git a/src/intel/vulkan_hasvk/genX_query.c b/src/intel/vulkan_hasvk/genX_query.c
index 5084ea82473..eae2de748b0 100644
--- a/src/intel/vulkan_hasvk/genX_query.c
+++ b/src/intel/vulkan_hasvk/genX_query.c
@@ -1016,7 +1016,7 @@ void genX(CmdBeginQueryIndexedEXT)(
       assert(reloc_idx == pdevice->n_perf_query_commands);
 
       const struct intel_device_info *devinfo = cmd_buffer->device->info;
-      const enum drm_i915_gem_engine_class engine_class = cmd_buffer->queue_family->engine_class;
+      const enum intel_engine_class engine_class = cmd_buffer->queue_family->engine_class;
       mi_self_mod_barrier(&b, devinfo->engine_class_prefetch[engine_class]);
 
       anv_batch_emit(&cmd_buffer->batch, GENX(PIPE_CONTROL), pc) {
diff --git a/src/intel/vulkan_hasvk/genX_state.c b/src/intel/vulkan_hasvk/genX_state.c
index 5cf3ad2290e..52aff461d0b 100644
--- a/src/intel/vulkan_hasvk/genX_state.c
+++ b/src/intel/vulkan_hasvk/genX_state.c
@@ -425,7 +425,7 @@ genX(init_device_state)(struct anv_device *device)
    for (uint32_t i = 0; i < device->queue_count; i++) {
       struct anv_queue *queue = &device->queues[i];
       switch (queue->family->engine_class) {
-      case I915_ENGINE_CLASS_RENDER:
+      case INTEL_ENGINE_CLASS_RENDER:
          res = init_render_queue_state(queue);
          break;
       default: