From 5243f292ef41fd1345c157ac7581ad24baf4b955 Mon Sep 17 00:00:00 2001 From: Vitaliy Triang3l Kuzmin Date: Tue, 12 Aug 2025 01:59:23 +0300 Subject: [PATCH] radv,ac: GFX10 depth/stencil HTILE mipmap bug info variable Reviewed-by: Samuel Pitoiset Signed-off-by: Vitaliy Triang3l Kuzmin Part-of: --- src/amd/common/ac_gpu_info.c | 4 ++++ src/amd/common/ac_gpu_info.h | 1 + src/amd/vulkan/radv_image.c | 4 ++-- 3 files changed, 7 insertions(+), 2 deletions(-) diff --git a/src/amd/common/ac_gpu_info.c b/src/amd/common/ac_gpu_info.c index e5cf7f8ba83..3521a22114e 100644 --- a/src/amd/common/ac_gpu_info.c +++ b/src/amd/common/ac_gpu_info.c @@ -935,6 +935,9 @@ ac_query_gpu_info(int fd, void *dev_p, struct radeon_info *info, info->has_gfx9_scissor_bug = info->family == CHIP_VEGA10 || info->family == CHIP_RAVEN; + /* Stencil texturing with HTILE doesn't work with mipmapping on Navi10-14. */ + info->has_htile_stencil_mipmap_bug = info->gfx_level == GFX10; + info->has_tc_compat_zrange_bug = info->gfx_level >= GFX8 && info->gfx_level <= GFX9; info->has_small_prim_filter_sample_loc_bug = @@ -1710,6 +1713,7 @@ void ac_print_gpu_info(const struct radeon_info *info, FILE *f) fprintf(f, " has_out_of_order_rast = %u\n", info->has_out_of_order_rast); fprintf(f, " cpdma_prefetch_writes_memory = %u\n", info->cpdma_prefetch_writes_memory); fprintf(f, " has_gfx9_scissor_bug = %i\n", info->has_gfx9_scissor_bug); + fprintf(f, " has_htile_stencil_mipmap_bug = %i\n", info->has_htile_stencil_mipmap_bug); fprintf(f, " has_tc_compat_zrange_bug = %i\n", info->has_tc_compat_zrange_bug); fprintf(f, " has_small_prim_filter_sample_loc_bug = %i\n", info->has_small_prim_filter_sample_loc_bug); fprintf(f, " has_ls_vgpr_init_bug = %i\n", info->has_ls_vgpr_init_bug); diff --git a/src/amd/common/ac_gpu_info.h b/src/amd/common/ac_gpu_info.h index 4d1eef7e845..b13c2d06359 100644 --- a/src/amd/common/ac_gpu_info.h +++ b/src/amd/common/ac_gpu_info.h @@ -96,6 +96,7 @@ struct radeon_info { bool has_accelerated_dot_product; bool cpdma_prefetch_writes_memory; bool has_gfx9_scissor_bug; + bool has_htile_stencil_mipmap_bug; bool has_tc_compat_zrange_bug; bool has_small_prim_filter_sample_loc_bug; bool has_ls_vgpr_init_bug; diff --git a/src/amd/vulkan/radv_image.c b/src/amd/vulkan/radv_image.c index a6dcfb44507..218a3de1323 100644 --- a/src/amd/vulkan/radv_image.c +++ b/src/amd/vulkan/radv_image.c @@ -407,8 +407,8 @@ radv_use_htile_for_image(const struct radv_device *device, const struct radv_ima */ bool use_htile_for_mips = image->vk.array_layers == 1 && pdev->info.gfx_level >= GFX10; - /* Stencil texturing with HTILE doesn't work with mipmapping on Navi10-14. */ - if (pdev->info.gfx_level == GFX10 && image->vk.format == VK_FORMAT_D32_SFLOAT_S8_UINT && image->vk.mip_levels > 1) + if (pdev->info.has_htile_stencil_mipmap_bug && image->vk.format == VK_FORMAT_D32_SFLOAT_S8_UINT && + image->vk.mip_levels > 1) return false; /* Do not enable HTILE for very small images because it seems less performant but make sure it's