diff --git a/src/amd/common/ac_gpu_info.c b/src/amd/common/ac_gpu_info.c index 83360370908..fd4e81d7ac7 100644 --- a/src/amd/common/ac_gpu_info.c +++ b/src/amd/common/ac_gpu_info.c @@ -1612,7 +1612,7 @@ void ac_compute_driver_uuid(char *uuid, size_t size) strncpy(uuid, amd_uuid, size); } -void ac_compute_device_uuid(struct radeon_info *info, char *uuid, size_t size) +void ac_compute_device_uuid(const struct radeon_info *info, char *uuid, size_t size) { uint32_t *uint_uuid = (uint32_t *)uuid; @@ -1634,7 +1634,7 @@ void ac_compute_device_uuid(struct radeon_info *info, char *uuid, size_t size) uint_uuid[3] = info->pci.func; } -void ac_print_gpu_info(struct radeon_info *info, FILE *f) +void ac_print_gpu_info(const struct radeon_info *info, FILE *f) { fprintf(f, "Device info:\n"); fprintf(f, " name = %s\n", info->name); @@ -1933,7 +1933,7 @@ int ac_get_gs_table_depth(enum amd_gfx_level gfx_level, enum radeon_family famil } } -void ac_get_raster_config(struct radeon_info *info, uint32_t *raster_config_p, +void ac_get_raster_config(const struct radeon_info *info, uint32_t *raster_config_p, uint32_t *raster_config_1_p, uint32_t *se_tile_repeat_p) { unsigned raster_config, raster_config_1, se_tile_repeat; @@ -2022,7 +2022,7 @@ void ac_get_raster_config(struct radeon_info *info, uint32_t *raster_config_p, *se_tile_repeat_p = se_tile_repeat; } -void ac_get_harvested_configs(struct radeon_info *info, unsigned raster_config, +void ac_get_harvested_configs(const struct radeon_info *info, unsigned raster_config, unsigned *cik_raster_config_1_p, unsigned *raster_config_se) { unsigned sh_per_se = MAX2(info->max_sa_per_se, 1); @@ -2155,7 +2155,7 @@ ac_get_compute_resource_limits(const struct radeon_info *info, unsigned waves_pe return compute_resource_limits; } -void ac_get_hs_info(struct radeon_info *info, +void ac_get_hs_info(const struct radeon_info *info, struct ac_hs_info *hs) { bool double_offchip_buffers = info->gfx_level >= GFX7 && @@ -2270,7 +2270,7 @@ static uint16_t get_task_num_entries(enum radeon_family fam) } } -void ac_get_task_info(struct radeon_info *info, +void ac_get_task_info(const struct radeon_info *info, struct ac_task_info *task_info) { const uint16_t num_entries = get_task_num_entries(info->family); diff --git a/src/amd/common/ac_gpu_info.h b/src/amd/common/ac_gpu_info.h index 1a829f2862a..79863312108 100644 --- a/src/amd/common/ac_gpu_info.h +++ b/src/amd/common/ac_gpu_info.h @@ -287,12 +287,12 @@ bool ac_query_pci_bus_info(int fd, struct radeon_info *info); void ac_compute_driver_uuid(char *uuid, size_t size); -void ac_compute_device_uuid(struct radeon_info *info, char *uuid, size_t size); -void ac_print_gpu_info(struct radeon_info *info, FILE *f); +void ac_compute_device_uuid(const struct radeon_info *info, char *uuid, size_t size); +void ac_print_gpu_info(const struct radeon_info *info, FILE *f); int ac_get_gs_table_depth(enum amd_gfx_level gfx_level, enum radeon_family family); -void ac_get_raster_config(struct radeon_info *info, uint32_t *raster_config_p, +void ac_get_raster_config(const struct radeon_info *info, uint32_t *raster_config_p, uint32_t *raster_config_1_p, uint32_t *se_tile_repeat_p); -void ac_get_harvested_configs(struct radeon_info *info, unsigned raster_config, +void ac_get_harvested_configs(const struct radeon_info *info, unsigned raster_config, unsigned *cik_raster_config_1_p, unsigned *raster_config_se); unsigned ac_get_compute_resource_limits(const struct radeon_info *info, unsigned waves_per_threadgroup, unsigned max_waves_per_sh, @@ -307,7 +307,7 @@ struct ac_hs_info { uint32_t tess_offchip_ring_size; }; -void ac_get_hs_info(struct radeon_info *info, +void ac_get_hs_info(const struct radeon_info *info, struct ac_hs_info *hs); /* Task rings BO layout information. @@ -351,7 +351,7 @@ struct ac_task_info { /* Size of the task control buffer. 9 DWORDs. */ #define AC_TASK_CTRLBUF_BYTES 36 -void ac_get_task_info(struct radeon_info *info, +void ac_get_task_info(const struct radeon_info *info, struct ac_task_info *task_info); uint32_t ac_memory_ops_per_clock(uint32_t vram_type); diff --git a/src/amd/common/ac_rgp.c b/src/amd/common/ac_rgp.c index 60296e76164..48c778dace7 100644 --- a/src/amd/common/ac_rgp.c +++ b/src/amd/common/ac_rgp.c @@ -408,7 +408,7 @@ static enum sqtt_memory_type ac_vram_type_to_sqtt_memory_type(uint32_t vram_type } } -static void ac_sqtt_fill_asic_info(struct radeon_info *rad_info, +static void ac_sqtt_fill_asic_info(const struct radeon_info *rad_info, struct sqtt_file_chunk_asic_info *chunk) { bool has_wave32 = rad_info->gfx_level >= GFX10; @@ -723,7 +723,7 @@ static enum sqtt_version ac_gfx_level_to_sqtt_version(enum amd_gfx_level gfx_lev } } -static void ac_sqtt_fill_sqtt_desc(struct radeon_info *info, +static void ac_sqtt_fill_sqtt_desc(const struct radeon_info *info, struct sqtt_file_chunk_sqtt_desc *chunk, int32_t chunk_index, int32_t shader_engine_index, int32_t compute_unit_index) { @@ -998,7 +998,7 @@ static void ac_sqtt_dump_spm(const struct ac_spm_trace *spm_trace, #if defined(USE_LIBELF) static void -ac_sqtt_dump_data(struct radeon_info *rad_info, struct ac_sqtt_trace *sqtt_trace, +ac_sqtt_dump_data(const struct radeon_info *rad_info, struct ac_sqtt_trace *sqtt_trace, const struct ac_spm_trace *spm_trace, FILE *output) { struct sqtt_file_chunk_asic_info asic_info = {0}; @@ -1181,7 +1181,7 @@ ac_sqtt_dump_data(struct radeon_info *rad_info, struct ac_sqtt_trace *sqtt_trace #endif int -ac_dump_rgp_capture(struct radeon_info *info, struct ac_sqtt_trace *sqtt_trace, +ac_dump_rgp_capture(const struct radeon_info *info, struct ac_sqtt_trace *sqtt_trace, const struct ac_spm_trace *spm_trace) { #if !defined(USE_LIBELF) diff --git a/src/amd/common/ac_rgp.h b/src/amd/common/ac_rgp.h index b8eda7a990b..a69c4ed58ea 100644 --- a/src/amd/common/ac_rgp.h +++ b/src/amd/common/ac_rgp.h @@ -188,7 +188,7 @@ struct rgp_clock_calibration { simple_mtx_t lock; }; -int ac_dump_rgp_capture(struct radeon_info *info, struct ac_sqtt_trace *sqtt_trace, +int ac_dump_rgp_capture(const struct radeon_info *info, struct ac_sqtt_trace *sqtt_trace, const struct ac_spm_trace *spm_trace); void diff --git a/src/amd/common/gfx10_format_table.h b/src/amd/common/gfx10_format_table.h index 14881cf7317..2071986d4b2 100644 --- a/src/amd/common/gfx10_format_table.h +++ b/src/amd/common/gfx10_format_table.h @@ -45,7 +45,7 @@ extern const struct gfx10_format gfx10_format_table[PIPE_FORMAT_COUNT]; extern const struct gfx10_format gfx11_format_table[PIPE_FORMAT_COUNT]; static inline -const struct gfx10_format* ac_get_gfx10_format_table(struct radeon_info *info) +const struct gfx10_format* ac_get_gfx10_format_table(const struct radeon_info *info) { if (info->gfx_level >= GFX11) return gfx11_format_table;