From 51ba6fedc6098ad38aad574a13994e8fab6c022c Mon Sep 17 00:00:00 2001 From: Connor Abbott Date: Mon, 21 Feb 2022 19:05:52 +0100 Subject: [PATCH] freedreno: Replace A6XX_IBO with A6XX_TEX_CONST Since these were reverse-engineered, it's become clear that IBO descriptors are just a subset of texture descriptors, and bindless reads of readonly images actually use isam on the IBO descriptor, further confirming that the two are always compatible, even if not all of the texture fields exist for IBOs. It's pointless to have a separate type for IBOs, and just leads to things getting out-of-sync unnecessarily which has already happened. Just remove it and use TEX_CONST insted. --- src/freedreno/computerator/a6xx.c | 10 ++-- src/freedreno/decode/cffdec.c | 2 +- src/freedreno/fdl/fd6_view.c | 28 ++++------ src/freedreno/registers/adreno/a6xx.xml | 65 ------------------------ src/freedreno/vulkan/tu_cmd_buffer.c | 2 +- src/freedreno/vulkan/tu_descriptor_set.c | 10 ++-- 6 files changed, 21 insertions(+), 96 deletions(-) diff --git a/src/freedreno/computerator/a6xx.c b/src/freedreno/computerator/a6xx.c index 64d79b2c4e6..cd7e61309ab 100644 --- a/src/freedreno/computerator/a6xx.c +++ b/src/freedreno/computerator/a6xx.c @@ -314,11 +314,11 @@ cs_ibo_emit(struct fd_ringbuffer *ring, struct fd_submit *submit, unsigned width = sz & MASK(15); unsigned height = sz >> 15; - OUT_RING(state, A6XX_IBO_0_FMT(FMT6_32_UINT) | A6XX_IBO_0_TILE_MODE(0)); - OUT_RING(state, A6XX_IBO_1_WIDTH(width) | A6XX_IBO_1_HEIGHT(height)); - OUT_RING(state, A6XX_IBO_2_PITCH(0) | A6XX_IBO_2_UNK4 | A6XX_IBO_2_UNK31 | - A6XX_IBO_2_TYPE(A6XX_TEX_1D)); - OUT_RING(state, A6XX_IBO_3_ARRAY_PITCH(0)); + OUT_RING(state, A6XX_TEX_CONST_0_FMT(FMT6_32_UINT) | A6XX_TEX_CONST_0_TILE_MODE(0)); + OUT_RING(state, A6XX_TEX_CONST_1_WIDTH(width) | A6XX_TEX_CONST_1_HEIGHT(height)); + OUT_RING(state, A6XX_TEX_CONST_2_PITCH(0) | A6XX_TEX_CONST_2_BUFFER | + A6XX_TEX_CONST_2_TYPE(A6XX_TEX_BUFFER)); + OUT_RING(state, A6XX_TEX_CONST_3_ARRAY_PITCH(0)); OUT_RELOC(state, kernel->bufs[i], 0, 0, 0); OUT_RING(state, 0x00000000); OUT_RING(state, 0x00000000); diff --git a/src/freedreno/decode/cffdec.c b/src/freedreno/decode/cffdec.c index 0c4dc1e905b..9c9ccc23913 100644 --- a/src/freedreno/decode/cffdec.c +++ b/src/freedreno/decode/cffdec.c @@ -1570,7 +1570,7 @@ cp_load_state(uint32_t *dwords, uint32_t sizedwords, int level) dump_domain(ssboconst, 4, level + 2, "A5XX_SSBO_0"); } else if (600 <= options->gpu_id && options->gpu_id < 700) { sz = 16; - dump_domain(ssboconst, 16, level + 2, "A6XX_IBO"); + dump_domain(ssboconst, 16, level + 2, "A6XX_TEX_CONST"); } dump_hex(ssboconst, sz, level + 1); ssboconst += sz; diff --git a/src/freedreno/fdl/fd6_view.c b/src/freedreno/fdl/fd6_view.c index 0f99dd0bb77..cacb90443d3 100644 --- a/src/freedreno/fdl/fd6_view.c +++ b/src/freedreno/fdl/fd6_view.c @@ -340,27 +340,17 @@ fdl6_view_init(struct fdl6_view *view, const struct fdl_layout **layouts, memset(view->storage_descriptor, 0, sizeof(view->storage_descriptor)); view->storage_descriptor[0] = - A6XX_IBO_0_FMT(storage_format) | - A6XX_IBO_0_TILE_MODE(tile_mode); - view->storage_descriptor[1] = - A6XX_IBO_1_WIDTH(width) | - A6XX_IBO_1_HEIGHT(height); + A6XX_TEX_CONST_0_FMT(storage_format) | + A6XX_TEX_CONST_0_TILE_MODE(tile_mode); + view->storage_descriptor[1] = view->descriptor[1]; view->storage_descriptor[2] = - A6XX_IBO_2_PITCH(pitch) | - A6XX_IBO_2_TYPE(fdl6_tex_type(args->type, true)); - view->storage_descriptor[3] = A6XX_IBO_3_ARRAY_PITCH(layer_size); - + A6XX_TEX_CONST_2_PITCH(pitch) | + A6XX_TEX_CONST_2_TYPE(fdl6_tex_type(args->type, true)); + view->storage_descriptor[3] = view->descriptor[3]; view->storage_descriptor[4] = base_addr; - view->storage_descriptor[5] = (base_addr >> 32) | A6XX_IBO_5_DEPTH(storage_depth); - - if (ubwc_enabled) { - view->storage_descriptor[3] |= A6XX_IBO_3_FLAG | A6XX_IBO_3_UNK27; - view->storage_descriptor[7] |= ubwc_addr; - view->storage_descriptor[8] |= ubwc_addr >> 32; - view->storage_descriptor[9] = A6XX_IBO_9_FLAG_BUFFER_ARRAY_PITCH(layout->ubwc_layer_size >> 2); - view->storage_descriptor[10] = - A6XX_IBO_10_FLAG_BUFFER_PITCH(ubwc_pitch); - } + view->storage_descriptor[5] = (base_addr >> 32) | A6XX_TEX_CONST_5_DEPTH(storage_depth); + for (unsigned i = 6; i <= 10; i++) + view->storage_descriptor[i] = view->descriptor[i]; view->width = width; view->height = height; diff --git a/src/freedreno/registers/adreno/a6xx.xml b/src/freedreno/registers/adreno/a6xx.xml index c9e1b77d43c..2bf482fd316 100644 --- a/src/freedreno/registers/adreno/a6xx.xml +++ b/src/freedreno/registers/adreno/a6xx.xml @@ -3882,71 +3882,6 @@ to upconvert to 32b float internally? - - - - - - - - - - - - - - - Pitch in bytes (so actually stride) - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - diff --git a/src/freedreno/vulkan/tu_cmd_buffer.c b/src/freedreno/vulkan/tu_cmd_buffer.c index 09fa0eaa0cc..0b136632288 100644 --- a/src/freedreno/vulkan/tu_cmd_buffer.c +++ b/src/freedreno/vulkan/tu_cmd_buffer.c @@ -1911,7 +1911,7 @@ tu_CmdBindDescriptorSets(VkCommandBuffer commandBuffer, dst[1] = va >> 32; } else { memcpy(dst, src, A6XX_TEX_CONST_DWORDS * 4); - /* Note: A6XX_IBO_5_DEPTH is always 0 */ + /* Note: A6XX_TEX_CONST_5_DEPTH is always 0 */ uint64_t va = dst[4] | ((uint64_t)dst[5] << 32); va += offset; dst[4] = va; diff --git a/src/freedreno/vulkan/tu_descriptor_set.c b/src/freedreno/vulkan/tu_descriptor_set.c index 834ade7a5ca..e23836a7fc1 100644 --- a/src/freedreno/vulkan/tu_descriptor_set.c +++ b/src/freedreno/vulkan/tu_descriptor_set.c @@ -863,17 +863,17 @@ write_buffer_descriptor(const struct tu_device *device, /* newer a6xx allows using 16-bit descriptor for both 16-bit and 32-bit access */ if (device->physical_device->info->a6xx.storage_16bit) { - dst[0] = A6XX_IBO_0_TILE_MODE(TILE6_LINEAR) | A6XX_IBO_0_FMT(FMT6_16_UINT); + dst[0] = A6XX_TEX_CONST_0_TILE_MODE(TILE6_LINEAR) | A6XX_TEX_CONST_0_FMT(FMT6_16_UINT); dst[1] = DIV_ROUND_UP(range, 2); } else { - dst[0] = A6XX_IBO_0_TILE_MODE(TILE6_LINEAR) | A6XX_IBO_0_FMT(FMT6_32_UINT); + dst[0] = A6XX_TEX_CONST_0_TILE_MODE(TILE6_LINEAR) | A6XX_TEX_CONST_0_FMT(FMT6_32_UINT); dst[1] = DIV_ROUND_UP(range, 4); } dst[2] = - A6XX_IBO_2_UNK4 | A6XX_IBO_2_TYPE(A6XX_TEX_1D) | A6XX_IBO_2_UNK31; + A6XX_TEX_CONST_2_BUFFER | A6XX_TEX_CONST_2_TYPE(A6XX_TEX_BUFFER); dst[3] = 0; - dst[4] = A6XX_IBO_4_BASE_LO(va); - dst[5] = A6XX_IBO_5_BASE_HI(va >> 32); + dst[4] = A6XX_TEX_CONST_4_BASE_LO(va); + dst[5] = A6XX_TEX_CONST_5_BASE_HI(va >> 32); for (int i = 6; i < A6XX_TEX_CONST_DWORDS; i++) dst[i] = 0; }